參數(shù)資料
型號(hào): TS87C52X2-VCEB
英文描述: 8-bit CMOS Microcontroller 0-60 MHz
中文描述: 8位CMOS微控制器0-60兆赫
文件頁數(shù): 14/54頁
文件大?。?/td> 626K
代理商: TS87C52X2-VCEB
14
Rev. B - Jan. 25, 1999
Preliminary
TS80C52X2
Figure 4. Auto-Reload Mode Up/Down Counter (DCEN = 1)
6.3.2 Programmable Clock-Output
In the clock-out mode, timer 2 operates as a 50%-duty-cycle, programmable clock generator (See Figure 5) . The
input clock increments TL2 at frequency F
OSC
/2. The timer repeatedly counts to overflow from a loaded value.
At overflow, the contents of RCAP2H and RCAP2L registers are loaded into TH2 and TL2. In this mode, timer
2 overflows do not generate interrupts. The formula gives the clock-out frequency as a function of the system
oscillator frequency and the value in the RCAP2H and RCAP2L registers :
For a 16 MHz system clock, timer 2 has a programmable frequency range of 61 Hz
(F
OSC
/2
16)
to 4 MHz (F
OSC
/4). The generated clock signal is brought out to T2 pin (P1.0).
Timer 2 is programmed for the clock-out mode as follows:
G
Set T2OE bit in T2MOD register.
G
Clear C/T2 bit in T2CON register.
G
Determine the 16-bit reload value from the formula and enter it in RCAP2H/RCAP2L registers.
G
Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the reload value or a different
one depending on the application.
(DOWN COUNTING RELOAD VALUE)
FFh
(8-bit)
(8-bit)
C/T2
T2CONreg
TF2
TR2
T2
EXF2
TH2
(8-bit)
TL2
(8-bit)
RCAP2H
(8-bit)
RCAP2L
(8-bit)
FFh
TOGGLE
(UP COUNTING RELOAD VALUE)
TIMER 2
INTERRUPT
XTAL1
:
12
F
OSC
F
XTAL
0
1
T2CONreg
T2CONreg
T2CONreg
T2EX:
if DCEN=1, 1=UP
if DCEN=1, 0=DOWN
if DCEN = 0, up counting
Clock
OutFrequency
Fosc
RCAP
2
H
4
65536
RCAP
2
L
)
--------------------------------------------------------------------------------------
=
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