![](http://datasheet.mmic.net.cn/260000/TS87C52X2-MCBB_datasheet_15975784/TS87C52X2-MCBB_5.png)
Rev. B - Jan. 25, 1999
5
Preliminary
TS80C52X2
Table 3. Pin Description for 40/44 pin packages
PIN NUMBER
TYPE
DIL
LCC
VQFP 1.4
Ground:
0V reference
1
39
I
Optional Ground:
Contact the Sales Office for ground connection.
Power Supply:
This is the power supply voltage for normal, idle and power-
down operation
39-32
43-36
37-30
I/O
Port 0
: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s
written to them float and can be used as high impedance inputs.Port 0 pins must
be polarized to Vcc or Vss in order to prevent any parasitic current consumption.
Port 0 is also the multiplexed low-order address and data bus during access to
external program and data memory. In this application, it uses strong internal
pull-up when emitting 1s. Port 0 also inputs the code bytes during EPROM
programming. External pull-ups are required during program verification during
which P0 outputs the code bytes.
1-8
2-9
40-44
1-3
pins that have 1s written to them are pulled high by the internal pull-ups and
can be used as inputs. As inputs, Port 1 pins that are externally pulled low will
source current because of the internal pull-ups. Port 1 also receives the low-order
address byte during memory programming and verification.
Alternate functions for Port 1 include:
1
2
40
I/O
T2 (P1.0):
Timer/Counter 2 external count input/Clockout
2
3
41
I
T2EX (P1.1):
Timer/Counter 2 Reload/Capture/Direction Control
21-28
24-31
18-25
I/O
Port 2
: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2
pins that have 1s written to them are pulled high by the internal pull-ups and
can be used as inputs. As inputs, Port 2 pins that are externally pulled low will
source current because of the internal pull-ups. Port 2 emits the high-order address
byte during fetches from external program memory and during accesses to external
data memory that use 16-bit addresses (MOVX @DPTR).In this application, it
uses strong internal pull-ups emitting 1s. During accesses to external data memory
that use 8-bit addresses (MOVX @Ri), port 2 emits the contents of the P2 SFR.
Some Port 2 pins receive the high order address bits during EPROM programming
and verification:
P2.0 to P2.4
10-17
11,
13-19
7-13
pins that have 1s written to them are pulled high by the internal pull-ups and
can be used as inputs. As inputs, Port 3 pins that are externally pulled low will
source current because of the internal pull-ups. Port 3 also serves the special
features of the 80C51 family, as listed below.
10
11
5
I
RXD (P3.0):
Serial input port
11
13
7
O
TXD (P3.1):
Serial output port
12
14
8
I
INT0 (P3.2):
External interrupt 0
13
15
9
I
INT1 (P3.3):
External interrupt 1
14
16
10
I
T0 (P3.4):
Timer 0 external input
15
17
11
I
T1 (P3.5):
Timer 1 external input
16
18
12
O
WR (P3.6):
External data memory write strobe
17
19
13
O
RD (P3.7):
External data memory read strobe
9
10
4
I
Reset:
A high on this pin for two machine cycles while the oscillator is running,
resets the device. An internal diffused resistor to V
SS
permits a power-on reset
using only an external capacitor to V
CC.
MNEMONIC
NAME AND FUNCTION
V
SS
Vss1
20
22
16
I
V
CC
40
44
38
I
P0.0-P0.7
P1.0-P1.7
I/O
Port 1:
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1
P2.0-P2.7
P3.0-P3.7
5,
I/O
Port 3:
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3
Reset