參數(shù)資料
型號： TS87C58X2-VCE
廠商： Atmel
文件頁數(shù)： 14/62頁
文件大?。?/td> 0K
描述： IC MCU 8BIT 32K OTP 40MHZ 44VQFP
標準包裝： 160
系列： 87C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40/30MHz
連通性： UART/USART
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： OTP
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： 0°C ~ 70°C
封裝/外殼： 44-QFP
包裝： 托盤
21
4431E–8051–04/06
AT/TS8xC54/8X2
The following is an example of how to use given addresses to address different slaves:
Slave A:
SADDR
1111 0001b
SADEN
1111 1010b
Given
1111 0X0Xb
Slave B:
SADDR
1111 0011b
SADEN
1111 1001b
Given
1111 0XX1b
Slave C:
SADDR
1111 0010b
SADEN
1111 1101b
Given
1111 00X1b
The SADEN byte is selected so that each slave may be addressed separately.
For slave A, bit 0 (the LSB) is a don’t-care bit; for slaves B and C, bit 0 is a 1. To communicate
with slave A only, the master must send an address where bit 0 is clear (e.g. 1111 0000b).
For slave A, bit 1 is a 1; for slaves B and C, bit 1 is a don’t care bit. To communicate with slaves
B and C, but not slave A, the master must send an address with bits 0 and 1 both set (e.g. 1111
0011b
).
To communicate with slaves A, B and C, the master must send an address with bit 0 set, bit 1
clear, and bit 2 clear (e.g. 1111 0001b).
9.1.3
Broadcast Address
A broadcast address is formed from the logical OR of the SADDR and SADEN registers with
zeros defined as don’t-care bits, e.g.:
SADDR
0101 0110b
SADEN
1111 1100b
Broadcast =SADDR OR SADEN
1111 111Xb
The use of don’t-care bits provides flexibility in defining the broadcast address, however in most
applications, a broadcast address is FFh. The following is an example of using broadcast
addresses:
Slave A:
SADDR
1111 0001b
SADEN
1111 1010b
Broadcast
1111 1X11b,
Slave B:
SADDR
1111 0011b
SADEN
1111 1001b
Broadcast
1111 1X11B,
Slave C:
SADDR=
1111 0010b
SADEN
1111 1101b
Broadcast
1111 1111b
For slaves A and B, bit 2 is a don’t care bit; for slave C, bit 2 is set. To communicate with all of
the slaves, the master must send an address FFh. To communicate with slaves A and B, but not
slave C, the master can send and address FBh.
9.1.4
Reset Addresses
On reset, the SADDR and SADEN registers are initialized to 00h, i.e. the given and broadcast
addresses are XXXX XXXXb (all don’t-care bits). This ensures that the serial port will reply to any
address, and so, that it is backwards compatible with the 80C51 microcontrollers that do not
support automatic address recognition.
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