參數(shù)資料
型號(hào)： TSA5514T
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： XO, clock
英文描述： 1.3 GHz bidirectional I2C-bus controlled synthesizer
中文描述： PLL FREQUENCY SYNTHESIZER, 1300 MHz, PDSO16
封裝： SO-16
文件頁(yè)數(shù)： 6/18頁(yè)
文件大?。?/td> 149K
代理商： TSA5514T
October 1992
6
Philips Semiconductors
Product specification
1.3 GHz bidirectional I
2
C-bus controlled synthesizer
TSA5514
FUNCTIONAL DESCRIPTION
The TSA5514 is controlled via the two-wire I
2
C-bus. For
programming, there is one module address (7 bits) and the
R/W bit for selecting READ or WRITE mode.
WRITE mode: R/W = 0 (see Table 1)
After the address transmission (first byte), data bytes can
be sent to the device. Four data bytes are required to fully
program the TSA5514. The bus transceiver has an
auto-increment facility which permits the programming of
the TSA5514 within one single transmission
(address + 4 data bytes).
The TSA5514 can also be partially programmed on the
condition that the first data byte following the address is
byte 2 or byte 4. The meaning of the bits in the data bytes
is given in Table 1. The first bit of the first data byte
transmitted indicates whether frequency data (first bit = 0)
or charge pump and port information (first bit = 1) will
follow. Until an I
2
C-bus STOP condition is sent by the
controller, additional data bytes can be entered without the
need to re-address the device. This allows a smooth
frequency sweep for fine tuning or AFC purpose. At
power-on the ports are set to the high impedance state.
The 7.8125 kHz reference frequency is obtained by
dividing the output of the 4 MHz crystal oscillator by 512.
Because the input of UHF/VHF signal is first divided by 8
the step size is 62.5 kHz. A 3.2 MHz crystal can offer step
sizes of 50 kHz.
Table 1
Write data format
Note to Table 1
Note
1.
x = don’t care
MSB
LSB
Address
Programmable divider
Programmable divider
Charge-pump and test bits
Output ports control bits
1
0
1
0
0
0
MA1
N10
N2
x
P2
MA0
N9
N1
x
P1*
0
A
A
A
A
A
byte 1
byte 2
byte 3
byte 4
byte 5
N14
N6
CP
P6
N13
N5
T1
P5
N12
N4
T0
P4
N11
N3
x
x
N8
N0
OS
P0*
N7
1
P7
*
MA1, MA0
A
N14 to N0
N = N14
×
2
14
+ N13
×
2
13
+...
+
N1
×
2
1
+N0
CP
CP = 0
CP = 1
P7 to P0 = 1
P7 to P0 = 0
T1, T0, OS = 0 0 0
T1 = 1
T0 = 1
OS = 1
Not valid for TSA5514T
programmable address bits (see Table 4)
acknowledge bit
programmable divider bits
charge-pump current
50
μ
A
220
μ
A
open-collector output is active
outputs are in high impedance state
normal operation
P6 = f
ref
, P7 = f
DIV
3-state charge-pump
operational amplifier output is switched off (varicap drive disable)
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