參數(shù)資料
型號(hào)： TSC21020F-20MBSB
英文描述： IC CYCLONE III FPGA 25K 144 EQFP
中文描述： 數(shù)字信號(hào)處理器| 32位|的CMOS | RAD數(shù)據(jù)通信硬| QFL | 256PIN |陶瓷
文件頁數(shù)： 10/51頁
文件大?。?/td> 763K
代理商： TSC21020F-20MBSB
10
TSC21020F
4153F
–
AERO
–
06/03
program and data memory interfaces in a high impedance state. In addition, three-state
controls (DTMS and PMTS) allow an external device to place either the program or data
memory interface in a high impedance state without affecting the other interface and
without halting the TSC21020F unless it requires a memory access from the affected
interface. The three-state controls make it easy for an external cache controller to hold
the TSC21020F off the bus while it updates an external cache memory.
JTAG Test and Emulation
Support
The TSC21020F implements the boundary scan testing provisions specified by IEEE
Standard 1149.1 of the Joint Testing Action Group (JTAG). The TSC21020F
’
s test
access port and On-chip JTAG circuitry is fully compliant with the IEEE 1149.1 specifi-
cation. The test access port enables boundary scan testing of circuitry connected to the
TSC21020F
’
s I/O pins.
The TSC21020F also implements On-chip emulation through the JTAG test access port.
The processor
’
s eight sets of breakpoint range registers enable program execution at
full speed until reaching a desired breakpoint address range. The processor can then
halt and allow reading/writing of all the processor
’
s internal registers and external mem-
ories through the JTAG port.
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSC21020F-20MBSC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC
TSC21020F-20MBSL1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC
TSC21020F-20MBSL2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC
TSC21020F-20MBSL3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC
TSC21020F-20MC-E 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Rad. Hard 32/40-bit IEEE Floating Point DSP
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