參數(shù)資料
型號： TSC80251G2D-24IA
廠商： TEMIC SEMICONDUCTORS
元件分類： 8位微控制器
英文描述： 8/16-bit Microcontroller with Serial Communication Interfaces
中文描述： 16位產(chǎn)品微控制器的串行通信接口
文件頁數(shù)： 23/63頁
文件大小： 878K
代理商： TSC80251G2D-24IA
23
Rev. A - May 7, 1999
TSC80251G2D
Table 28. Summary of Move Instructions (3/3)
Notes:
1. Instructions that move bits are in Table 29.
2. Move instructions unique to the C251 Architecture.
3. If this instruction addresses an I/O Port (Px, x= 0-3), add 1 to the number of states. Add 2 if it addresses a Peripheral SFR.
4. If this instruction addresses external memory location, add N+2 to the number of states (N: number of wait states).
5. If this instruction addresses external memory location, add 2(N+1) to the number of states (N: number of wait states).
6. If this instruction addresses external memory location, add 4(N+2) to the number of states (N: number of wait states).
Move
(1)
MOV <dest>, <src>
dest opnd
←
src opnd
Mnemonic
<dest>, <src>
(1)
Comments
Binary Mode
Source Mode
Bytes
States
Bytes
States
MOV
Rmd, Rms
Byte register to byte register
3
2
2
1
WRjd, WRjs
Word register to word register
3
2
2
1
DRkd, DRks
Dword register to dword register
3
3
2
2
Rm, #data
Immediate 8-bit data to byte register
4
3
3
2
WRj, #data16
Immediate 16-bit data to word register
5
3
4
2
DRk, #0data16
zero-ext 16bit immediate data to dword register
5
5
4
4
DRk, #1data16
one-ext 16bit immediate data to dword register
5
5
4
4
Rm, dir8
Direct address (on-chip RAM or SFR) to byte register
4
3
(3)
3
2
(3)
WRj, dir8
Direct address (on-chip RAM or SFR) to word register
4
4
3
3
DRk, dir8
Direct address (on-chip RAM or SFR) to dword register
4
6
3
5
Rm, dir16
Direct address (64K) to byte register
5
3
(4)
4
(5)
6
(6)
3
(4)
4
(4)
4
(5)
5
(5)
4
(3)
4
2
(4)
3
(5)
5
(6)
2
(4)
3
(4)
3
(5)
4
(5)
3
(3)
WRj, dir16
Direct address (64K) to word register
5
4
DRk, dir16
Direct address (64K) to dword register
5
4
Rm, @WRj
Indirect address (64K) to byte register
4
3
Rm, @DRk
Indirect address (16M) to byte register
4
3
WRjd, @WRjs
Indirect address (64K) to word register
4
3
WRj, @DRk
Indirect address (16M) to word register
4
3
dir8, Rm
Byte register to direct address (on-chip RAM or SFR)
4
3
dir8, WRj
Word register to direct address (on-chip RAM or SFR)
4
5
3
4
dir8, DRk
Dword register to direct address (on-chip RAM or SFR)
4
7
3
6
dir16, Rm
Byte register to direct address (64K)
5
4
(4)
5
(5)
7
(6)
4
(4)
5
(4)
5
(5)
6
(5)
6
(4)
7
(5)
7
(4)
8
(5)
6
(4)
7
(5)
7
(4)
8
(5)
4
3
(4)
4
(5)
6
(6)
3
(4)
4
(4)
4
(5)
5
(5)
5
(4)
6
(5)
6
(4)
7
(5)
5
(4)
6
(5)
6
(4)
7
(5)
dir16, WRj
Word register to direct address (64K)
5
4
dir16, DRk
Dword register to direct address (64K)
5
4
@WRj, Rm
Byte register to indirect address (64K)
4
3
@DRk, Rm
Byte register to indirect address (16M)
4
3
@WRjd, WRjs
Word register to indirect address (64K)
4
3
@DRk, WRj
Word register to indirect address (16M)
4
3
Rm, @WRj +dis16
Indirect with 16-bit displacement (64K) to byte register
5
4
WRj, @WRj +dis16 Indirect with 16-bit displacement (64K) to word register
5
4
Rm, @DRk +dis24
Indirect with 16-bit displacement (16M) to byte register
5
4
WRj, @WRj +dis24 Indirect with 16-bit displacement (16M) to word register
5
4
@WRj +dis16, Rm
Byte register to indirect with 16-bit displacement (64K)
5
4
@WRj +dis16, WRj Word register to indirect with 16-bit displacement (64K)
5
4
@DRk +dis24, Rm
Byte register to indirect with 16-bit displacement (16M)
5
4
@DRk +dis24, WRj Word register to indirect with 16-bit displacement (16M)
5
4
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