參數(shù)資料
型號(hào)： TSC80C31-16KAD
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 16 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁(yè)數(shù)： 13/83頁(yè)
文件大?。?/td> 8336K
代理商： TSC80C31-16KAD
158
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
16.10 General CAN Registers
16.10.1 CAN General Control Register - CANGCON
Bit 7 – ABRQ: Abort Request
This is not an auto resettable bit.
●
0 - no request.
●
1 - abort request: a reset of CANEN1 and CANEN2 registers is done. The pending communications are immediately
disabled and the on-going one will be normally terminated, setting the appropriate status flags.
Note that CANCDMOB register remain unchanged.
Bit 6 – OVRQ: Overload Frame Request
This is not an auto resettable bit.
●
0 - no request.
●
1 - overload frame request: send an overload frame after the next received frame.
The overload frame can be traced observing OVFG in CANGSTA register (c.f. Figure 16-9 on page 149).
Bit 5 – TTC: Time Trigger Communication
●
0 - no TTC.
●
1 - TTC mode.
Bit 4 – SYNTTC: Synchronization of TTC
This bit is only used in TTC mode.
●
0 - the TTC timer is caught on SOF.
●
1 - the TTC timer is caught on the last bit of the EOF.
Bit 3 – LISTEN: Listening Mode
●
0 - no listening mode.
●
1 - listening mode.
Bit 2 – TEST: Test Mode
●
0 - no test mode
●
1 - test mode: intend for factory testing and not for customer use.
Note:
CAN may malfunction if this bit is set.
Bit 1 – ENA/STB: Enable / Standby Mode
Because this bit is a command and is not immediately effective, the ENFG bit in CANGSTA register gives the true state of the
chosen mode.
●
0 - standby mode: The on-going transmission (if exists) is normally terminated and the CAN channel is frozen (the
CONMOB bits of every MOb do not change). The transmitter constantly provides a recessive level. In this mode, the
receiver is not enabled but all the registers and mailbox remain accessible from CPU. In this mode, the receiver is not
enabled but all the registers and mailbox remain accessible from CPU.
Note:
A standby mode applied during a reception may corrupt the on-going reception or set the controller in a wrong
state. The controller will restart correctly from this state if a software reset (SWRES) is applied. If no reset is con-
sidered, a possible solution is to wait for a lake of a receiver busy (RXBSY) before to enter in stand-by mode. The
best solution is first to apply an abort request command (ABRQ) and then wait for the lake of the receiver busy
(RXBSY) before to enter in stand-by mode. In any cases, this standby mode behavior has no effect on the CAN
bus integrity.
Bit
76543
2
1
0
ABRQ
OVRQ
TTC
SYNTTC
LISTEN
TEST
ENA/STB
SWRES CANGCON
Read/Write
R/W
Initial Value
00000
0
相關(guān)PDF資料
PDF描述
TSC80C31-40JDB 8-BIT, 40 MHz, MICROCONTROLLER, PQFP44
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