- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄225344 > TSC80C31-25MIDP883 (ATMEL CORP) 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44 PDF資料下載
參數(shù)資料
| 型號(hào)： | TSC80C31-25MIDP883 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | CERAMIC, QPJ-44 |
| 文件頁(yè)數(shù)： | 5/19頁(yè) |
| 文件大?。?/td> | 212K |
| 代理商： | TSC80C31-25MIDP883 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)當(dāng)前第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)
TSC80C31/80C51
Rev. E (14 Jan.97)
13
MATRA MHS
Idle ICC is measured with all output pins disconnected ;
XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL =
VSS + 0.5 V, VIH = VCC – 0.5 V ; XTAL2 N.C ; Port 0 =
VCC ; EA = RST = VSS.
Power Down ICC is measured with all output pins
disconnected ; EA = PORT 0 = VCC ; XTAL2 N.C. ;
RST = VSS.
Note 2 : Capacitance loading on Ports 0 and 2 may cause
spurious noise pulses to be superimposed on the VOLS of
ALE and Ports 1 and 3. The noise is due to external bus
capacitance discharging into the Port 0 and Port 2 pins
when these pins make 1 to 0 transitions during bus
operations. In the worst cases (capacitive loading 100
pF), the noise pulse on the ALE line may exceed 0.45 V
with maxi VOL peak 0.6 V. A Schmitt Trigger use is not
necessary.
Note 3 : Typicals are based on a limited number of
samples and are not guaranteed. the values listed are at
room temperature and 5V.
Note 4 : Under steady state (non–transient)) conditions,
IOL must be externally limited as follows :
Maximum IOL per port pin :
10 mA
Maximum IOL per 8–bit port :
Port 0 :
26 mA
Ports 1, 2 and 3 :
15 mA
Maximum total IOL for all output pins :
71 mA
If IOL exceed the test condition, VOL may exceed the
related specification. Pins are not guaranteed to sink
current greater than the listed test conditions.
Figure 7. ICC Test Condition, Idle Mode.
All other pins are disconnected.
Figure 8. ICC Test Condition, Active Mode.
All other pins are disconnected.
Figure 9. ICC Test Condition, Power Down Mode.
All other pins are disconnected.
Figure 10. Clock Signal Waveform for ICC Tests in Active and Idle Modes.
TCLCH = TCHCL = 5 ns.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSC80C31-40AHB | 8-BIT, 40 MHz, MICROCONTROLLER, CQCC44 |
| TSC80C51-36ABD | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PQCC44 |
| TSC80C51-36MIB | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQCC44 |
| TSC80C51CXXX-12MIRP883 | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| TSC80C51CXXX-40MIBP883 | 8-BIT, MROM, 40 MHz, MICROCONTROLLER, CQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSC80C31-25MIR/883 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller |
| TSC80C31-25MWB/883 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller |
| TSC80C31-25MWD/883 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller |
| TSC80C31-25MWR/883 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller |
| TSC80C31-25MXB/883 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。