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參數(shù)資料
| 型號： | TSI62B1 |
| 廠商： | 意法半導體 |
| 英文描述： | TERMINAL SET INTERFACE PROTECTION AND DIODE BRIDGE |
| 中文描述： | Set接口端子保護和二極管橋 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大小： | 173K |
| 代理商： | TSI62B1 |
This test concerns the 10/700
μ
s waveform surge,
±
1.5 kV.
The surge generator used for the test has the
following circuitry (fig.2).
TEST # 1
LIGHTNING SIMULATION
Fig. 2
: 10/700
μ
s waveform surge generator circuit
The behaviour of the TSI200B1 to this lightning surge is given below (fig. 3).
Fig. 3 :
Voltage across the TSI200B1 at the + and - terminations and current throught it
for a 1.5 kV positive surge (fig.3a) and negative surge (fig. 3b)
These curves show the peak voltage the surge
generates across the TSI200B1 + and -
terminations. This lasts a short time (
≈
2
μ
s) and
after, as the internal protection gehaves like a short
circuit. The voltage drop across the TSIxxB1
becomes a few volts. In the meanwhile all the
surge current flows in the protection.
As far as the 10/700
μ
s waveform surge test is
concerned,the TSIxxB1 withstand the
±
1.5 kV
test.
TSIxxB1
4/9
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