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參數(shù)資料
| 型號(hào)： | TSM101IDT |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁(yè)數(shù)： | 4/5頁(yè) |
| 文件大?。?/td> | 55K |
| 代理商： | TSM101IDT |
TSM100
4/5
COMPARATOR
V
CC
+
= +5V, V
CC
= Ground,T
amb
= 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
io
Input Offset Voltage
T
amb
= 25°C
Input Offset Current
Input Bias Current
Large Signal Voltage Gain
V
CC
= 15V, R
L
= 15k, Vo = 1V to 11V
Input Common Mode Voltage Range
1)
Output Sink Current
V
id
= -1V, V
o
= 1.5V
Low Level Output Voltage
V
id
= -1V, I
sink
= 4mA
High Level Output Current
V
id
= 1V, V
cc
= V
o
= 30V
Response Time
R
L
= 5.1k to V
CC
+
2)
Large Signal Response Time
V
i
= TTL, V
ref
= +1.4V, R
L
= 5.1k to V
CC
+
1
5
mV
I
io
I
ib
5
50
250
nA
nA
V/mV
25
Avd
200
Vicm
1. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of
the common-mode voltage range is V
CC+
- 1.5V.
But either of both inputs can go to 36V without damage.
2. The response time is specified for a 100mV input step with 5mV overdrive. For larger overdrive signals, 300ns can be obtained
0
(V
CC
+
) -1.5
V
I
sink
6
16
mA
V
OL
250
400
mV
I
OH
0.1
nA
t
re
1.3
μs
t
rel
300
ns
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