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TSM111 is a HousekeepingIC which is best used
in PC Switch Mode Power Suppliesfor secondary
3.3V,5V, and 12V power lines protection.
TSM111integratesall thenecessaryfunctionsfora
secure and reliable overcurrent and overvoltage
protection, as well as a logic interface for proper
communication with the motherboard and adjust-
able timing circuitry for optimized sequencingman-
agement. Moreover, TSM111 integrates two pre-
ciseshuntvoltage referencesfor direct optocoupler
drive. TSM111, integratingthe equivalent of more
than 25 discrete components,savesa lotof design
time and fine tuning, as well as PCB area, and in-
creases thereliability of thewhole application.
How to use the TSM111 Evaluation Board
Thisevaluation boardallows to adapt the TSM111
housekeepingchiptoanalreadyexistingPC Power
Supplyby simply choosingproper valuesfor it’s ex-
ternalcomponents,and making the adequatecon-
nections to the I/O of the evaluationboard.
The Electrical Schematicof the TSM111evaluation
boardis shownon figure 1. It includes the TSM111
as well as the minimum component number re-
quiredto makethe TSM111 fit in a PC SMPSappli-
cation.
Components calculations
The overvoltageprotectionis not to be adjusted.In-
ternal voltage thresholdsare givenby Vvs1, Vvs2,
Vvs3for respective protectionof the 3.3V, 5V, 12V
powerlines.
The overcurrent protectionis given bythe choiceof
the Sense resistors R1, R2, R3 (respectively for
eachpowerline3.3V,5V,12V).Internalprecisevolt-
age thresholdsdefinethe tripping voltage drops for
each line following equations1, 2 & 3 :
Vcs1= R1 x I33
Vcs2= R2 x I5
Vcs3= R3 x I12
whereI33, I5, and I12 are the tripping currents.
The system will latch (Fault output will be active -
high) if the overcurrent lasts more than the author-
izedsurge delay Tsur given by equations4 & 5 :
Icharge= Vcc / R4
Tsur = (C1 x Vsur) / Icharge
Note that eq4 is an approximation of a capacitive
charge where Vcc (16V min) is large versus the
thresholdvoltage Vsur (2.5V).
R4=33k
, C1=4.7
μ
F => Tsur=21ms
Thanks to the Tsur adjustment, the normal surge
currents which occur during power up (capacitive
eq1
eq2
eq3
eq4
eq5
EVALUATION BOARD - TECHNICAL NOTICE
VI s 5
U1
1
I s 3 3
UV
2 0
1 9
VI s 1 2
TSM111
2
1 8
V s 1 2
V rF bV rF b A u x
3
1 4
1 5
1 3
1 2
PG
9
Rem
7
T R e m
8
A d j
4
G n d
1 6
V c c
5
11
Tsur
17
PWM
6
R1
rs3.3V
R2
rs5V
R3
rs12V
D1
UV
R4
Rsur
C1
Csur
C2
Crem
R5 R rem
C3
Cpor
R6
1
2
J1
Vdet
1
2
J2
Fault
1
2
J3
Optaux
1
J5
In3.3V
1
J6
1
J7
In3.3V
Vdet
Optaux
Fault
In5V
In12V
Out12V
Out5V
Out3.3V
1
J8
Out12V
J9
Out5V
J10
Out3.3V
1
1
PG
1
2
J11
PG
1
2
3
4
SW1
BP Rem
1
2
J12
Rem
From c
5Vstby
5Vstby
1
2
J13
Vcc
1
2
J14
Gnd
VCC
1
2
J15
VrefMain
VrefMain
R7
RoptMain
VrefAux
J18
R8
R9
Roptaux
C4
C5
1
2
J16
VrefAux
R10
1
2
J20
D5
D6
I1INV
1
2
OptMain
OptMain
Vin
2
G N D
1
Vout
3
U2 78L05
5Vstby
+
C7
R11
5Vstby
In5V
IN12V
EVALUATION BOARD - ELECTRICAL SCHEMATIC
C6
TSM111
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