參數(shù)資料
型號(hào): TSPC603RMGSU6LC
元件分類: 微處理器
英文描述: MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC
中文描述: 微處理器| 32位|的CMOS | BGA封裝| 255PIN |陶瓷
文件頁數(shù): 7/42頁
文件大小: 961K
代理商: TSPC603RMGSU6LC
7
TSPC603R
2125A–12/01
Figure 3.
Functional Signal Groups
Table 3.
Address and data bus signal index
Signal Name
Mnemonic
Signal function
Signal
type
Address Bus
A[0-31]
if output, physical address of data to be transferred.
if input, represents the physical address of a snoop operation.
I/O
Data Bus
DH[0-31]
Represents the state of data, during a data write operation if output, or during a
data read operation if input.
I/O
Data Bus
DL[0-31]
Represents the state of data, during a data write operation if output, or during a
data read operation if input.
I/O
BR
BG
ABB
TS
TT[0-4]
TBST
AP[0-3]
APE
TSIZ[0-2]
GBL
CI
WT
CSE[0-1]
TC[0-1]
AACK
ARTRY
SYSCLK
CLK_OUT
PLL_CFG[0-3]
DBG
DBWO
DBB
DPE
DBDIS
DP[0-7]
DH[0-31], DL[0-31]
A[0-31]
TA
DRTRY
TEA
INT, SMI
MCP
HRESET, SRESET
CKSTP_IN, CKSTP_OUT
RSRV
QREQ, QACK
TBEN
TLBISYNC
TRST, TCK, TMS, TDI, TD0
5
LSSD_MODE,
L1_TSTCLK, L2_TSTCLK
3
1
1
1
VDD
OVDD
GND
AVDD
ADDRESS
ARBITRATION
ADDRESS
START
ADDRESS
BUS
TRANSFER
ATTRIBUTE
ADDRESS
TERMINATION
CLOCKS
DATA
ATTRIBUTION
DATA
TRANSFER
DATA
TERMINATION
INTERRUPTS
CHECKSTOPS
RESET
PROCESSOR
STATUS
JTAG/COP
INTERFACE
LSSD TEST
CONTROL
POWER SUPPLY
64
8
1
1
1
1
1
2
1
2
2
1
2
1
1
20
19
40
1
1
1
1
1
1
1
32
4
1
5
1
3
1
1
1
2
2
4
1
1
6
VOLTDETGND
1
POWER SUPPLY
INDICATOR
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