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參數(shù)資料
| 型號： | TSPC603RMGU6LC |
| 元件分類： | 微處理器 |
| 英文描述： | MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
| 中文描述： | 微處理器| 32位|的CMOS | BGA封裝| 255PIN |陶瓷 |
| 文件頁數(shù)： | 3/42頁 |
| 文件大?。?/td> | 961K |
| 代理商： | TSPC603RMGU6LC |
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3
TSPC603R
2125A–12/01
Introduction
The 603r is a low-power implementation of the PowerPC microprocessor family of reduced
instruction set computer (RISC) microprocessors. The 603r implements the 32-bit portion of
the PowerPC architecture, which provides 32-bit effective addresses, integer data types of 8,
16 and 32 bits, and floating-point data types of 32 and 64 bits. For 64-bit PowerPC micropro-
cessors, the PowerPC architecture provides 64-bit integer data types, 64-bit addressing, and
other features required to complete the 64-bit architecture.
The 603r provides four software controllable power-saving modes. Three of the modes (the
nap, doze, and sleep modes) are static in nature, and progressively reduce the amount of
power dissipated by the processor. The fourth is a dynamic power management mode that
causes the functional units in the 603r to automatically enter a low-power mode when the
functional units are idle without affecting operational performance, software execution, or any
external hardware.
The 603r is a superscalar processor capable of issuing and retiring as many as three instruc-
tions per clock. Instructions can execute out of order for increased performance; however, the
603r makes completion appear sequential.
The 603e integrates five execution units—an integer unit (IU), a floating-point unit (FPU), a
branch processing unit (BPU), a load/store unit (LSU) and a system register unit (SRU). The
ability to execute five instructions in parallel and the use of simple instructions with rapid exe-
cution times yield high efficiency and throughput for 603r-based systems. Most integer
instructions execute in one clock cycle. The FPU is pipelined so a single-precision multi-
ply-add instruction can be issued every clock cycle.
The 603r provides independent on-chip, 16K byte, four-way set-associative, physically
addressed caches for instructions and data and on-chip instruction and data memory manage-
ment units (MMUs). The MMUs contain 64-entry, two-way set-associative, data and
instruction translation look aside buffers (DTLB and ITLB) that provide support for
demand-paged virtual memory address translation and variable-sized block translation. The
TLBs and caches use a least recently used (LRU) replacement algorithm. The 603r also sup-
ports block address translation through the use of two independent instruction and data block
address translation (IBAT and DBAT) arrays of four entries each. Effective addresses are
compared simultaneously with all four entries in the BAT array during block translation. In
accordance with the PowerPC architecture, if an effective address hits in both the TLB and
BAT array, the BAT translation takes priority.
The 603r has a selectable 32- or 64-bit data bus and a 32-bit address bus. The 603r interface
protocol allows multiple masters to compete for system resources through a central external
arbiter. The 603r provides a three-state coherency protocol that supports the exclusive, modi-
fied, and invalid cache states. This protocol as a compatible subset of the MESI
(modified/exclusive/shared/invalid) four-state protocol and operates coherently in systems that
contain four-state caches. The 603r supports single-beat and burst data transfers for memory
accesses, and supports memory-mapped I/O.
The 603r uses an advanced, 0.29 μm 5 metal layer CMOS process technology and maintains
full interface compatibility with TTL devices.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSPC603RMGU8LC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
| TSPC603RVA8LC | 功能描述:IC MPU 32BIT 8MHZ 240CERQUAD RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點(diǎn):全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤 |
| TSPC603RVAB/Q8L | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RVAB/Q8LC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e |
| TSPC603RVG10LC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC |
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