1
Features
12.4SPECint95,8.4SPECfp95at266MHz(TSPC750A)with1MBL2at133MHz
11.5SPECint95,6.9SPECfp95at266MHz(TSPC740A)
488MIPSat266MHz
SelectableBusClock(11CPUBusDividersupto8x)
P
D
Typical4.2Wat200MHz,FullOperatingConditions
Nap,DozeandSleepModesforPowerSavings
Superscalar(3InstructionsperClockCycle)
4-GByteDirectAddressingRange
64-bitDataand32-bitAddressBusInterface
32KBInstructionandDataCache
SixIndependentExecutionUnitsandTwoRegisterFiles
Write-backandWrite-throughOperations
f
int
max=266MHz
f
bus
max=83.3MHz
CompatibleCMOSInput/TTLOutput
Description
TheTSPC750AandTSPC740Amicroprocessor(afternamed750A/740A)arelow-
powerimplementationsofthePowerPCReducedInstructionSetComputer(RISC)
architecture.
The750A/740Amicroprocessors’designsaresuperscalar,capableofissuingthree
instructionsperclockcycleintosixindependentexecutionunits.
The740A/750Amicroprocessorsusea2.6/3.3VCMOSprocesstechnologyand
maintainfullinterfacecompatibilitywithTTLdevices.
The750A/740Aprovidefoursoftwarecontrollablepower-savingmodesandathermal
assistunitmanagement.
The750A/740Amicroprocessorshaveseparate32Kbyte,physically-addressed
instructionanddatacachesanddifferonlyinthatthe750AfeaturesadedicatedL2
cacheinterfacewithL2on-chiptags.
Botharesoftwareandbus-compatiblewiththePowerPC603
andPowerPC604
families,andarefullyJTAGcompliant.
TheTSPC740AmicroprocessorispincompatiblewiththeTSPC603efamily.
G suffix
CBGA255 and CBGA360
Ceramic Ball Grid Array
GS suffix
CI-CBGA255 and CI-CBGA360
Ceramic Ball Grid Array
with Solder Column Interposer (SCI)
PowerPC
750A/740ARISC
Microprocessor
FamilyPID8t-
750A/740A
Specification
TSPC750A/740A
Rev.2128A–HIREL–01/02