參數(shù)資料
型號: TSXPC603RVGU12LC
英文描述: MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC
中文描述: 微處理器| 32位|的CMOS | BGA封裝| 255PIN |陶瓷
文件頁數(shù): 6/42頁
文件大?。?/td> 961K
代理商: TSXPC603RVGU12LC
6
TSPC603R
2125A–12/01
Notes:
1. These are test signals for factory use only and must be pulled up to OV
DD
for normal machine operation.
2. OV
DD
inputs supply power to the I/O drivers and V
DD
inputs supply power to the processor core.
3. NC (no-connect) in the 603e BGA package; internally tied to GND in the 603r BGA package to indicate to the power supply
that a low-voltage processor is present.
Signal Description
Figure 3, Table 3 and Table 4 describe the signals on the TSPC603r and indicate signal func-
tions. The test signals, TRST, TMS, TCK, TDI and TDO, comply with subset P-1149.1 of the
IEEE testability bus standard.
The 3 signals LSSD_MODE, LI_TSTCLK and L2_TSTCLK are test signals for factory use only
and must be pulled up to VDD for normal machine operations.
L1_TSTCLK
(1)
D11
-
Input
L2_TSTCLK
(1)
D12
-
Input
LSSD_MODE
(1)
B10
Low
Input
MCP
C13
Low
Input
PLL_CFG[0-3]
A08, B09, A09, D09
High
Input
QACK
D03
Low
Input
QREQ
J03
Low
Output
RSRV
D01
Low
Output
SMI
A16
Low
Input
SRESET
B14
Low
Input
SYSCLK
C09
-
Input
TA
H14
Low
Input
TBEN
C02
High
Input
TBST
A14
Low
I/O
TC[0-1]
A02, A03
High
Output
TCK
C11
-
Input
TDI
A11
High
Input
TDO
A12
High
Output
TEA
H13
Low
Input
TLBISYNC
C04
Low
Input
TMS
B11
High
Input
TRST
C10
Low
Input
TS
J13
Low
I/O
TSIZ[0-2]
A13, D10, B12
High
I/O
TT[0-4]
B13, A15, B16, C14, C15
High
I/O
WT
D02
Low
Output
NC
B07, B08, C03, C06, C08, D05, D06, F03, H04, J16
Low
Input
VOLTDETGND
(3)
F03
Low
Output
Table 2.
Signal Pinout Listing
Signal Name
CBGA Pin Number
Active
I/O
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