參數(shù)資料
型號(hào): TWL1103TPBSQ1
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP32
封裝: PLASTIC, TQFP-32
文件頁(yè)數(shù): 9/30頁(yè)
文件大?。?/td> 458K
代理商: TWL1103TPBSQ1
TWL1103T Q1
VOICEBAND AUDIO PROCESSOR (VBAP)
SGLS120B APRIL 2002 REVISED APRIL 2008
17
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Transmit PGA and sidetone control register: Address {02}HEX
Bit definitions:
7
6
5
4
3
2
1
0
DEFINITION
PDO
TP3
TP2
TP1
TP0
ST2
ST1
ST0
See Table 2 and Table 4
0
1
0
Default setting
Receive volume control register: Address {03}HEX
Bit definitions :
7
6
5
4
3
2
1
0
DEFINITION
RP3
RP2
RP1
RP0
RV3
RV2
RV1
RV0
See Table 3 and Table 5
0
1
0
Default setting
High tone selection control register: Address {04}HEX
Bit definitions:
7
6
5
4
3
2
1
0
DEFINITION
X
DTMF (see Table 7)
0
Default setting
Low tone selection control register: Address {05}HEX
Bit definitions:
7
6
5
4
3
2
1
0
DEFINITION
X
DTMF (see Table 7)
0
Default setting
0
1
2
3
4
N2
N1
N
N+1
Transmit Time Slot
1
2
3
4
N2
N1
N
80%
20%
tsu(PCMSYN)
th(PCMSYN)
See Note A
See Note C
See Note B
tpd2
tpd1
See Note D
tsu(PCMO)
tpd3
80%
20%
PCMCLK
PCMSYN
PCMO
NOTES: A. This window is allowed for PCMSYN high.
B. This window is allowed for PCMSYN low (th(PCMSYN)max determined by data collision considerations).
C. Transitions are measured at 50%.
D. Bit 1 = MSB, Bit N = LSB
Figure 4. Transmit Timing Diagram
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