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參數(shù)資料
型號: TXB0102DCURG4
廠商: Texas Instruments
文件頁數(shù): 20/20頁
文件大小: 0K
描述: IC VOLT-LVL TRANSL BI-DIR 8-US8
標(biāo)準(zhǔn)包裝: 3,000
邏輯功能: 變換器,雙向
位數(shù): 2
輸入類型: 邏輯
輸出類型: 邏輯
數(shù)據(jù)速率: 100Mbps
通道數(shù): 2
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 4ns
電源電壓: 1.2 V ~ 3.6 V,1.65 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-VFSOP(0.091",2.30mm 寬)
供應(yīng)商設(shè)備封裝: US8
包裝: 帶卷 (TR)
4k
4k
A
B
VCCA
VCCB
One
Shot
One
Shot
One
Shot
One
Shot
T1
T2
T3
T4
SCES641B – MAY 2007 – REVISED MAY 2012
PRINCIPLES OF OPERATION
Applications
The TXB0102 can be used in level-translation applications for interfacing devices or systems operating at
different interface voltages with one another.
Architecture
The TXB0102 architecture (see Figure 2) does not require a direction-control signal to control the direction of
data flow from A to B or from B to A. In a dc state, the output drivers of the TXB0101 can maintain a high or low,
but are designed to be weak, so that they can be overdriven by an external driver when data on the bus starts
flowing the opposite direction.
The output one shots detect rising or falling edges on the A or B ports. During a rising edge, the one shot turns
on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly,
during a falling edge, the one shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up
the high-to-low transition. The typical output impedance during output transition is 70
at VCCO = 1.2 V to 1.8 V,
50
at VCCO = 1.8 V to 3.3 V, and 40 at VCCO = 3.3 V to 5 V.
Figure 2. Architecture of TXB0102 I/O Cell
Input Driver Requirements
Typical IIN vs VIN characteristics of the TXB0102 are shown in Figure 3. For proper operation, the device driving
the data I/Os of the TXB0102 must have drive strength of at least ±2 mA.
Copyright 2007–2012, Texas Instruments Incorporated
9
Product Folder Link(s): TXB0102
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