參數(shù)資料
型號： TXN1322040152
廠商： INTEL CORP
元件分類： 光收發(fā)
英文描述： FIBER OPTIC TRANSCEIVER, TRANSPONDER, 1530-1565nm, 10000Mbps(Tx), 10000Mbps(Rx), FC/UPC CONNECTOR
封裝： ROHS COMPLIANT, PACKAGE-300
文件頁數(shù)： 31/52頁
文件大?。?/td> 1394K
代理商： TXN1322040152
Intel TXN13220/1/4/5/7/8 SFF 10 Gbps Optical Transceiver
26-Oct-2006
Datasheet
Order Number: 273807004
37
Intel TXN13220/1/4/5/7/8 SFF 10 Gbps Optical Transceiver
D10
Digital GND
In
Supply
Digital Ground
D11
Digital GND
In
Supply
Digital Ground
D12
NIC
N/A
No Internal Connection
D13
Digital GND
In
Supply
Digital Ground
D14
Digital GND
In
Supply
Digital Ground
D15
NIC
N/A
No Internal Connection
D16
Digital GND
In
Supply
Digital Ground
D17
Digital GND
In
Supply
Digital Ground
D18
LsPOWMON
Out
Analog
Laser power monitor. Output proportional to transmit laser average
output power. Nominal value of 0.5 V should remain constant due to
high gain power control loop. Range: 0–2 V, ± 100 A
D19
Digital GND
In
Supply
Digital Ground
D20
Digital GND
In
Supply
Digital Ground
D21
LsTEMPMON
Out
Analog
Laser temperature monitor. Output proportional to transmit laser
temperature V = 0.764*e3887*(1/T - 1/298) Volts, where T is temp in
Kelvins. Nominally 0.4 to 0.6 V under normal operation. Range: 0–3.3
V, ± 100 A
D22
Digital GND
In
Supply
Digital Ground
D23
Digital GND
In
Supply
Digital Ground
D24
NIC
N/A
No Internal Connection
D25
Digital GND
In
Supply
Digital Ground
D26
Digital GND
In
Supply
Digital Ground
D27
NIC
N/A
No Internal Connection
D28
Digital GND
In
Supply
Digital Ground
D29
Digital GND
In
Supply
Digital Ground
D30
LsPOWALM
Out
LVTTL
Logic 0: Alarm
Logic 1: Normal
Laser power alarm. Logic high when the laser output power drops to
half of the beginning of life output power, and corresponds to a voltage
of 0.25 V on the Laser Power Monitor (LsPOWMON) analog voltage.
E1
RxDout8P
Out
LVDS
Receiver (1/
16
line bit rate) data output, differential pairs.
E2
RxDout8N
Out
LVDS
Receiver (1/16 line bit rate) data output, differential pairs.
E3
Digital GND
In
Supply
Digital Ground
E4
RxDout9P
Out
LVDS
Receiver (1/
16
line bit rate) data output, differential pairs.
E5
RxDout9N
Out
LVDS
Receiver (1/16 line bit rate) data output, differential pairs.
E6
Digital GND
In
Supply
Digital Ground
E7
RxDout10P
Out
LVDS
Receiver (1/
16
line bit rate) data output, differential pairs.
E8
RxDout10N
Out
LVDS
Receiver (1/16 line bit rate) data output, differential pairs.
E9
Digital GND
In
Supply
Digital Ground
E10
RxDout11P
Out
LVDS
Receiver (1/
16
line bit rate) data output, differential pairs.
E11
RxDout11N
Out
LVDS
Receiver (1/16 line bit rate) data output, differential pairs.
E12
Digital GND
In
Supply
Digital Ground
E13
RxPOCLKP
Out
LVDS
Receiver (1/
16
line bit rate MHz) clock output, differential pairs, aligned
with output data.
Table 39. Input and Output Termination Description (Sheet 4 of 9)
Pin
Num-
ber
Symbol
I/O
Logic
Description
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