參數(shù)資料
型號(hào): TXN132204015A41
廠(chǎng)商: INTEL CORP
元件分類(lèi): 光收發(fā)
英文描述: FIBER OPTIC TRANSCEIVER, TRANSPONDER, 1530-1565nm, 10000Mbps(Tx), 10000Mbps(Rx), SC/UPC CONNECTOR
封裝: ROHS COMPLIANT, PACKAGE-300
文件頁(yè)數(shù): 32/52頁(yè)
文件大?。?/td> 1394K
代理商: TXN132204015A41
Intel TXN13220/1/4/5/7/8 SFF 10 Gbps Optical Transceiver
Intel TXN13220/1/4/5/7/8 SFF 10 Gbps Optical Transceiver
Datasheet
26-Oct-2006
38
Order Number: 273807004
E14
RxPOCLKN
Out
LVDS
Receiver (1/
16
line bit rate MHz) clock output, differential pairs, aligned
with output data.
E15
Digital GND
In
Supply
Digital Ground
E16
TxDin8P
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
E17
TxDin8N
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
E18
Digital GND
In
Supply
Digital Ground
E19
TxDin9P
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
E20
TxDin9N
In
LVDS,internally 100
Ω
terminated
Transmitter (1/
16
line bit rate) data input, differential pairs.
E21
Digital GND
In
Supply
Digital Ground
E22
TxDin10P
In
LVDS,internally 100
Ω
terminated
Transmitter (1/
16
line bit rate) data input, differential pairs.
E23
TxDin10N
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
E24
Digital GND
In
Supply
Digital Ground
E25
TxDin11P
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
E26
TxDin11N
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
E27
Digital GND
In
Supply
Digital Ground
E28
TxPCLKP
Out
LVDS
Transmitter (1/16 line bit rate) reference clock output, differential pair
E29
TxPCLKN
Out
LVDS
Transmitter (1/
16
line bit rate) reference clock output, differential pair
E30
Digital GND
In
Supply
Digital Ground
F1
NIC
N/A
No Internal Connection
F2
NIC
N/A
No Internal Connection
F3
RxPOWMON
Out
Analog
Output voltage proportional to average received optical power.
Referenced to 0 V with typ. slope of 1 V/mW (min. 0.8 V/mW, max.
1.26 V/mW)
F4
+3.3 V Digital In
Supply
Digital Power
F5
+3.3 V Digital In
Supply
Digital Power
F6
RxPOWALM
Out
LVTTL Logic 0: No
input signal
Logic 1: Input signal
present
Receiver loss of average power alarm. Logic high for signal above
receiver sensitivity. Low for signal </= 30 dBm.
F7
+3.3 V Digital In
Supply
Digital Power
F8
+3.3 V Digital In
Supply
Digital Power
F9
NIC
N/A
No Internal Connection
F10
-5.2 V Digital
In
Supply
Digital Power
F11
-5.2 V Digital
In
Supply
Digital Power
F12
NIC
N/A
No Internal Connection
F13
-5.2 V Digital
In
Supply
Digital Power
F14
-5.2 V Digital
In
Supply
Digital Power
Table 39. Input and Output Termination Description (Sheet 5 of 9)
Pin
Num-
ber
Symbol
I/O
Logic
Description
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