2003 Sep 03
14
Philips Semiconductors
Product specification
High speed advanced analog DVD signal
processor and laser supply
TZA1038HW
7.2.5
A
UTOMATIC DUAL LASER SUPPLY
The TZA1038HW can control the output power of two
lasers; it has an Automatic Laser Power Control (ALPC)
that stabilizes the laser output power and compensates
the effects of temperature and ageing of the laser.
ALPC automatically detects if there is a P-type or N-type
monitor diode in use in either of the laser circuits. The
regulation loop formed by the ALPC, the laser, the monitor
diode and the associated adjustment resistor will settle at
themonitorinputvoltage.Themonitorinputvoltagecanbe
programmed to HIGH (
≈
180 mV) or LOW (
≈
150 mV),
according to frequently-used pre-adjustments of the light
pen. This set point can be set independently for both
ALPCs. Bandwidth limitation and smooth switch-on
behaviour is realized using an internal capacitor.
A protection circuit is included to prevent laser damage
due to dips in laser supply voltage V
DDL
. If a supply voltage
dip occurs, the output can saturate and restrict the
required laser current. Without the protection circuit, the
ALPC would try to maximize the output power with
destructive results for the laser when the supply voltage
recovers. The protection circuit monitors the supply
voltage and shuts off the laser when the voltage drops
belowasafevalue.TheALPCrecoversautomaticallyafter
the dip has passed.
Only one laser can be activated at the same time.
An internal break-before-make circuit ensures safe
start-up for the laser when a toggle situation between the
two lasers is detected. When both lasers are programmed
on, neither laser will be activated.
7.2.6
P
OWER
-
ON RESET AND GENERAL POWER ON
When the supply voltage is switched on, bit PWRON is
reset by the Power-On Reset (POR) signal. This
concludes in a STANDBY mode at power up. POR is
intended to prevent the lasers being damaged due to
randomsettings.Allotherfunctionsmaybeswitchedwhen
power is on. The TZA1038HW becomes active when
bit PWRON = 1.
7.2.7
C
OMPATIBILITY WITH
TZA1033HL/V1
7.2.7.1
Software compatibility
The TZA1038HW is highly software compatible with the
TZA1033HL/V1. Provided that some conditions are met,
the software of the TZA1038HW can be used as a
successor with just minor modifications. This compatibility
is achieved with the implementation of the TZA1038HW
mode control bit (bit K2_Mode). When bit K2_Mode = 0,
the TZA1038HW will act as a TZA1033HL/V1. When
bit K2_Mode = 1, the TZA1038HW will act as a
TZA1033HL/K2 and the new functions will be available
(but require a software update).
Other conditions or restrictions are:
Register bits of the TZA1038HW which were not defined
areprogrammedtoalogic 0.Registers 9, 10, 14and 15
may be left undefined
The G
4
stage high gain setting of the TZA1033HL/V1 is
not available in the TZA1038HW; if this value was set to
logic 0, there will be no difference
Whenbit K2_Mode = 0theRF bandwidthwillbefixedto
theminimumvalueof10 MHz(typical);bit K2_Mode = 1
toselectahigherbandwidth;the bandwidthisnowlower
than using a TZA1033HL/V1.
7.2.7.2
Hardware compatibility
ThepackageischangedfromLQFP64fortheTZA1033HL
to LQFP48 for the TZA1038HW.
The hardware differences are:
Input pins STB, HEADER and LAND of the TZA1033HL
are not present
Input pins CD of TZA1033HL/V1 are not used;
TZA1038HW has RFSUM inputs instead; the RFSUM
inputs of TZA1038HW may be connected to ground
when not used.