參數(shù)資料
型號(hào): UC2907Q
廠商: Texas Instruments, Inc.
英文描述: Vertical Deflection Booster for 3-App TV/Monitor Applications with 70-V Flyback Generator
中文描述: 負(fù)載共享規(guī)控制器
文件頁(yè)數(shù): 2/7頁(yè)
文件大?。?/td> 269K
代理商: UC2907Q
2
UC1907
UC2907
UC3907
DIL-16 (Top View)
J or N Package
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +35V
Opto Out Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +35V
Opto Out Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20mA
Status Indicate Sink Current. . . . . . . . . . . . . . . . . . . . . . +20mA
C/S Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +35V
Share Bus Voltage. . . . . . . . . . . . . . . . . . . . . . . – 0.3V to +35V
Other Analog Inputs and Outputs (Zener clamped)
Maximum Forced Voltage . . . . . . . . . . . . . . . – 0.3V to +10V
Maximum Forced Current. . . . . . . . . . . . . . . . . . . . . . ±10mA
Ground Amp Sink Current . . . . . . . . . . . . . . . . . . . . . . . +50mA
Pins 1, 9, 12, 15 Sink Current. . . . . . . . . . . . . . . . . . . . . +20mA
Storage Temperature Range. . . . . . . . . . . . . – 65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . – 55°C to +150°C
Lead Temperature (Solder 10 Seconds) . . . . . . . . . . . . +300°C
Pin Nos. refer to 16 Pin DIL Package
Currents are positive into, negative out of the specified
terminal. Consult packaging section of databook for thermal
limitations and considerations of package.
CONNECTION DIAGRAMS
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated these specifications apply for T
A
= –55°C to +125°C for
UC1907; –40°C to +85°C for UC2907; and 0°C to +70°C for UC3907; V
IN
= 15V, T
A
=T
J
.
PARAMETER
TEST CONDITIONS
Voltage Amp Section
Input Voltage
COMP = 1V, T
A
= 25°C
COMP = 1V, Over Temp
Line Regulation
V
IN
= 4.5V to 35V
Load Regulation
I
L
Reference = 0.0mA to – 10mA
Long Term Stability
T
A
= 125°C, 1000hrs (Note 2)
Total Output Variation
Line, Load, Temp
Input Adjust Range
ADJ OUT from max high to max low
Input Bias Current
Open Loop Gain
COMP = 0.75V to 1.5V
Unity Gain Bandwidth
T
A
= 25°C (Note 2)
Output Sink Current
(+) SENSE = 2.2V, COMP = 1V
Output Source Current
(+) SENSE = 1.8V, COMP = 1V
V
OUT
High
(+) SENSE = 1.8V, I
L
= – 400
μ
a
V
OUT
Low
(+) SENSE = 2.2V, I
L
= +1mA
MIN
TYP
MAX
UNITS
1.975
1.960
2.000
2.000
2.025
2.040
15
10
25
2.040
115
V
V
mV
mV
mV
5
1.960
85
–1
65
700
6
400
1.85
100
mV
μ
A
dB
kHz
mA
μ
A
V
V
15
600
2
0.15
0.40
PLCC–20, LCC–20 (Top View)
Q PACKAGE, L PACKAGE
SOIC-16 (Top View)
DW Package
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PDF描述
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