參數(shù)資料
型號(hào): UC381J
英文描述: Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6 V tolerant inputs and outputs
中文描述: 模擬IC
文件頁(yè)數(shù): 5/13頁(yè)
文件大小: 265K
代理商: UC381J
SLUS212E NOVEMBER 1999 REVISED FEBRUARY 2004
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
The UC385 is easy to use. The adjustable version requires two resistors to set the output voltage. The fixed
versions of the UC385 require no external resistors. All versions of the UC385 require decoupling capacitors
on the input and output. In a typical application, VB and VIN are driven from switching power supplies which
may have large filter capacitors at their outputs. If the UC385 is further than 12 inches from the power supply,
it is recommended to add local decoupling as close as possible to the linear regulator.
Decouple the output of the UC385 with at least 100
μ
F of high quality tantalum or Sanyo OSCON capacitors
close to the VOUT pin for maximum stability. Many applications involving ultrafast GTL or BTL applications
require additional capacitance close to the load. The exact amount will vary according to speed and magnitude
of the load transients and the tolerance allowed for transients on VOUT. When specifying the decoupling
capacitors, the series resistance of the capacitor bank is an important factor in its ability to filter load transients.
The UC385 allows for Kelvin sensing the voltage at the load. This improves regulation performance and
eliminates the voltage drops due to wire trace resistance. This voltage drop must be added to the headroom
(VIN to VOUT and VB to VOUT). The dropout of 350 mV is measured at the pins and does not include additional
drops due to trace resistance.
OPEN LOOP PHASE
vs.
FREQUENCY
f Frequency Hz
P
10 M
1 M
100 k
10 k
1 k
100
180
90
0
Figure 3
CO = 100
μ
F
IL = 1 A
Figure 4
OPEN LOOP GAIN
vs.
FREQUENCY
10 M
1 M
100 k
10 k
1 k
100
10
0
10
20
30
40
50
60
70
f Frequency Hz
G
CO = 100
μ
F
IL = 1 A
相關(guān)PDF資料
PDF描述
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