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參數(shù)資料
| 型號： | UC3855AQ |
| 英文描述： | Low voltage CMOS octal D-type latch (3-state non inv.) with 5V tolerant inputs |
| 中文描述： | 功率因數(shù)控制器 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大?。?/td> | 265K |
| 代理商： | UC3855AQ |
SLUS212E NOVEMBER 1999 REVISED FEBRUARY 2004
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
pin descriptions
ADJ:
In the adjustable version, the user programs the output voltage with two external resistors. The resistors
should be 0.1% for high accuracy. The output amplifier is configured as a noninverting operational amplifier. The
resistors should meet the criteria of R3 || R4 < 100
. Connect ADJ to VOUT for an output voltage of 1.2 V. Note
that the point at which the feedback network is connected to the output is the Kelvin sense point.
GND:
For accurate results, the GND pin should be referenced to the load ground.
VB:
Supplies power to all circuits of the regulator except the output power transistor. The 2-V headroom from
VB to VOUT allows the use of a Darlington output stage for inherently low output impedance and fast response.
(Dropout is derated for junction temperatures below 0
°
C.)
VIN:
Supplies the current to the collector of the output power transistor only. The dropout (VIN-VOUT) is under
100 mV for light loads; maximum dropout is 490 mV at 5 A for T
J
= 0
°
C to 100
°
C. (Dropout is derated for junction
temperatures over 100
°
C.)
VOUT:
This pin should be connected to the load via a low impedance path. Avoid connectors which add
significant inductance and resistance. Note that even though a Kelvin sense is available through a 5-pin
package, care must be taken since voltage drops along wire traces add to the dropout voltage.
Figure 1
DROPOUT VOLTAGE (VB VOUT)
vs.
LOAD CURRENT
1.6
1.7
0
5
4
3
2
1
1.625
1.65
1.675
IL Load Current A
V
V
TJ = 27
°
C
Figure 2
DROPOUT VOLTAGE (VIN VOUT)
vs.
LOAD CURRENT
100
200
300
400
100m
5
IL Load Current A
V
TJ = 27
°
C
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