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參數(shù)資料
| 型號： | UCC3924 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | HIGH-VOLTAGE HOT-SWAP POWER MANAGER |
| 中文描述： | 高壓熱插拔電源管理器 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 153K |
| 代理商： | UCC3924 |
SLUS471 – NOVEMBER 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
programming for fault timeout
During the time when the power FET is regulating current to the load, FLTTIME is pulled high with 10
μ
A. When
the load current drops below the commanded maximum load current, FLTTIME is quickly pulled low. If FLTTIME
charges to 4 V before the power FET fully enhances, the fault latch sets and the load is immediately turned off.
gate drive output
When ON is low, GATE is held low. When ON is asserted high, IRAMP is released and allows C
IRAMP
to charge.
During this time, GATE rises, turning on the external power FET so that:
ILOAD
0.01
VIRAMP
RSENSE
VIN
IRAMP does not ramp higher than 5 V above –VIN, so load current is programmed to a maximum of
0.05/R
SENSE
. If the load is unable to accept the current, GATE rises up to 12 V above –VIN, fully enhancing
the power FET. If load current ever spikes above that maximum value, the current limiting amplifier reduces
GATE voltage to a level that maintains I
LOAD
at 0.05/R
SENSE
.
ground
GND is the ground input to the IC in negative supply systems. The ON input signal is measured with respect
to GND. All other signals are with respect to –VIN.
insertion detection
INSA and INSB are active-low inputs that must be asserted for the IC to drive the load. These inputs have
internal pullup current sources of 10
μ
A so they can be driven by open-drain logic. These inputs can also be
used as board insertion detection inputs. In this case, these inputs would be connected to corner pins of a
connector. The mating pins of the connector would be connected to –VIN. This would prevent operation before
both corners of the connector are mated.
current ramping
When ON is low, IRAMP is held low. When ON is asserted high, IRAMP is released and allows C
IRAMP
to charge.
During this time, GATE rises, turning on the external power FET so that:
ILOAD
0.01
VIRAMP
RSENSE
VIN
IRAMP does not ramp higher than 5 V above –VIN, so load current is programmed to a maximum of
0.05/R
SENSE
.
current sensing
Load current is sensed by the voltage between ISENS and –VIN. A current sense resistor, RSENSE is
connected between ISENS and –VIN. Maximum load current is limited to:
ILOAD
0.01
VIRAMP
RSENSE
VIN
during current ramp and ILOAD
0.05
RSENSE
when IRAMP reaches final value.
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