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參數(shù)資料
| 型號(hào)： | UCC3927 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類(lèi)： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | HIGH-VOLTAGE HOT-SWAP POWER MANAGER |
| 中文描述： | 高壓熱插拔電源管理器 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 153K |
| 代理商： | UCC3927 |
SLUS471 – NOVEMBER 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NO.
DESCRIPTION
NAME
UCC3923
UCC3926
UCC3924
UCC3927
UCC3925
UCC3928
I/O
DRAINSENS
–
10
16
I
Power good detection input
FAULT
1
1
6
O
Logic fault output
FLTTIME
2
2
7
I
Programming for fault timeout
GATE
3
3
8
O
Gate drive output
GND
4
4
9
I
Ground
INSA
–
5
10
I
Insertion detection input A
INSB
–
6
11
I
Insertion detection input B
IRAMP
5
7
12
I
Programming for current ramping
ISENS
6
8
13
I
Current sense input
ON
7
9
14
O
Logic command to turn on power to load
OVLO
–
–
15
I
Input overvoltage detection input
PG1
–
12
1
O
Enable for first downstream load
PG2
–
–
2
O
Enable for second downstream load
PG3
–
–
3
O
Enable for third downstream load
PG4
–
–
4
O
Enable for fourth downstream load
PG5
–
–
5
O
Enable for fifth downstream load
REF
–
11
17
O
Reference output
SEQTIME
–
–
18
I
Programming for downstream load sequencing
UVLO
–
13
19
I
Input undervoltage detection input
–VIN
8
14
20
I
Negative supply input
detailed description
power good detection input (UCC3924 and UCC3925 only)
DRAINSENS is an input that senses the voltage across the power FET. When the voltage on DRAINSENS is
less than 1V with respect to –VIN and IRAMP is greater than or equal to 5 V with respect to –VIN, then the power
FET is considered fully on and the PG outputs are allowed to begin sequencing the loads.
logic fault output (UCC3923, UCC3924, UCC3925)
FAULT is an open-drain, active-low driver that asserts when the fault latch is set. The UCC3923 UCC3924 and
UCC3925 controls the load inrush during starting by closed-loop regulation of load current. When the ON input
is low, IRAMP, FLTTIME, and SEQTIME are held low. When ON is asserted high, IRAMP is released and allows
C
IRAMP
to charge. Load current is limited to:
VIRAMP
RSENSE
ILOAD
0.01
During this time, C
FLTTIME
charges. If C
FLTTIME
charges to 4 V before the power FET fully enhances, the fault
latch sets, the load is immediately turned off, and FAULT pulls low. The fault latch is cleared when ON is pulled
low.
P
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