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參數(shù)資料
| 型號： | UCD9240PHR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | UCD9240 Digital Point of Load System Controller |
| 中文描述： | UCD9240系列數(shù)字點系統(tǒng)控制器的負荷 |
| 文件頁數(shù)： | 15/21頁 |
| 文件大小： | 572K |
| 代理商： | UCD9240PHR |
UCD9240
Digital Point of Load System Controller
Digital Compensator
SLUS766
– APRIL 2007
www.ti.com
15
Each voltage rail controller in the UCD9240 includes a digital compensator. The compensator is a digital filter
consisting of a second order infinite impulse response (IIR) filter section cascaded with a first order IIR filter
section. based design tool program:
The development tool for the UCD9240 comes with the "POWER+DESIGNER", which can be used to assist in
defining the compensator coefficients. The design tool allows the compensator to be described in terms of the
pole frequencies, zero frequencies and gain desired for the control loop. In addition, the Design Tool can be used
to characterize the power stage so that the compensator coefficients can be chosen based on the total loop gain
for each feedback system. The coefficients of the filter sections are generated thru modeling the power stage and
load in the Power+ Designer.
Additionally, the UCD9240 allows for several banks of filter coefficients which can be configured to switch
automatically based on the operation of the power stage.
The compensator also allows the minimum and maximum duty cycle to be programmed. This again is done by
issuing a PMBus command to the device.
PWM Engine
The output of the compensator feeds the high resolution PWM engine. The PWM engine produces the pulse width
modulated gate drive output from the device. In operation, the compensator calculates the necessary duty cycle
as a 16-bit number representing a value from 0.0 to 1.0. This duty cycle value is multiplied by the period to
generate the duty period. The resolution of the duty period is 250 psec.
When the UCD9240 is configured to drive multiple power stage circuits from one compensator, each gate drive
output pulse width is adjusted to correct for current imbalance between the connected power stage sections. This
is done by monitoring the current using input on the current sense pins and increasing the pulse width of the PWM
signal driving the power stage with the lowest current and decreasing the pulse width of the PWM signal driving
the power stage with the highest measured current.
Each PWM engine can be synchronized to another PMW engine or to an external sync signal via the SYNC_IN
and SYNC_OUT pins. An input sync signal causes a PWM ramp timer to reset. Sync signal outputs from each of
the four PWM engines occur when the ramp timer crosses a programmed threshold. In this way the phase of
multiple power stage drive signals can be tightly controlled. The synchronization behavior is programmed through
a MFR_SPECIFIC PMBus command.
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| UCD9240RGCR | 功能描述:電壓模式 PWM 控制器 Dig Point of Load System Controller RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓撲結(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| UCD9240RGCT | 功能描述:電壓模式 PWM 控制器 Dig Point of Load System Controller RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓撲結(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| UCD9240RGCTG4 | 制造商:Texas Instruments 功能描述: |
| UCD9240RHBR | 制造商:TI 制造商全稱:Texas Instruments 功能描述:UCD9240 Digital Point of Load System Controller |
| UCD9244 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital PWM System Controller with 4-bit, 6-bit, or 8-bit VID Support |
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