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參數(shù)資料
| 型號(hào)： | UDA1384H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Multichannel audio coder-decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 8/55頁 |
| 文件大?。?/td> | 276K |
| 代理商： | UDA1384H |
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9397 750 14366
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
8 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
8.2 Audio analog-to-digital converter (audio ADC)
The audio analog-to-digital front-end of the UDA1384 consists of 4-channel single-ended
ADCs with programmable gain stage (from 0 dB to 24 dB with 3 dB steps), controlled via
the microcontroller interface. Using the PGA feature, it is possible to accept an input signal
of 900 mV (RMS) or 1.8 V (RMS) if an external resistor of 10 k
is used in series. The
schematic of audio ADC front-end is shown in
Figure 3
.
8.3 Voice Analog-to-Digital Converter (voice ADC)
The voice analog-to-digital front-end of the UDA1384 consists of a single-channel
single-ended ADC with a fixed gain (26 dB) Low Noise Amplifier (LNA). Together with the
digital variable gain amplification stage, the voice ADC provides optimal processing and
reproduction of the microphone signal. The supported sampling frequency range is from
7 kHz to 50 kHz. Power-down of the LNA and the ADC can be controlled separately.
8.4 Decimation filter of audio ADC
The decimation from 64f
s
is performed in two stages. The first stage realizes
characteristics with a decimation factor of 8. The second stage consists of three half-band
filters, each decimating by a factor of 2. The filter characteristics are shown in
Table 7
.
8.5 Decimation filter of voice ADC
The voice ADC decimation filter is realized with the combination of a Finite Impulse
Response (FIR) filter and Infinite Impulse Response (IIR) filter for shorter group delay. The
filter characteristics are shown in
Table 8
. During the power-on sequence, the output of
the ADC is hard muted for a certain period. This hard-mute time can be chosen between
1024 samples and 2048 samples.
Fig 3.
Schematic of audio ADC front-end
mgu582
V
ref
ADC
V
DDA
= 3.3 V
VINL,
VINR
10 k
(0 dB setting)
10 k
10 k
input signal
2 V (RMS)
Table 7:
Item
Pass-band ripple
Pass-band droop
Stop band
Dynamic range
Decimation filter characteristics (audio ADC)
Condition
0f
s
to 0.45f
s
0.45f
s
> 0.55f
s
0f
s
to 0.45f
s
Value (dB)
±
0.01
0.2
70
> 135
x
----------
x
4
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| UDA1384H/N1,518 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 LOW COST MULTICHANNEL CODEC RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1384H/N1,557 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 LOW COST MULTICHANNEL CODEC RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1384H-T | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 LO CST MULTICH CODEC RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1431T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit, 48 kHz, low-cost stereo current DAC |
| UDA15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Voltage Rectifier |
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