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參數(shù)資料
| 型號： | UF840-TF3-T |
| 廠商： | UNISONIC TECHNOLOGIES CO LTD |
| 元件分類： | JFETs |
| 英文描述： | 8A, 500V, 0.85ohm, N-CHANNEL POWER MOSFET |
| 中文描述： | 8 A, 500 V, 0.85 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB |
| 封裝： | TO-220F, 3 PIN |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 182K |
| 代理商： | UF840-TF3-T |
UF840
MOSFET
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
2 of 8
QW-R502-047,C
ABSOLUTE MAXIMUM RATINGS
(Ta = 25
, unless Otherwise Specified.)
PARAMETER
SYMBOL
V
DSS
V
DGR
V
GS
RATINGS
500
500
±20
8.0
5.1
32
125
1.0
UNIT
V
V
V
A
A
A
W
W/
Drain to Source Voltage (T
J
=25
Drain to Gate Voltage (R
GS
= 20k
, T
J
=25
Gate to Source Voltage
~125
)
~125
)
Continuous
Tc = 100
Pulsed
I
D
Drain Current
I
DM
Total Power Dissipation (Ta = 25
Derating above 25
Single Pulse Avalanche Energy Rating
(V
DD
=50V, starting T
J
=25
Operating Temperature Range
Storage Temperature Range
Note: 1.Signified recommend operating range that indicates conditions for which the device is intended to be
functional, but does not guarantee specific performance limits.
2.Absolute maximum ratings indicate limits beyond which damage to the device may occur.
THERMAL DATA
P
D
, L=14mH, R
G
=25
, peak I
AS
= 8A)
E
AS
510
mJ
T
OPR
T
STG
-55 ~ +150
-55 ~ +150
PARAMETER
SYMBOL
θ
JA
θ
Jc
RATINGS
62.5
1.0
UNIT
Thermal Resistance Junction-Ambient
Thermal Resistance Junction-Case
/W
ELECTRICAL SPECIFICATIONS
(T
a
=25
, unless Otherwise Specified.)
PARAMETER
SYMBOL
BV
DSS
V
GS(THR)
I
D(ON)
TEST CONDITIONS
MIN TYP MAX UNIT
500
2
8
Drain to Source Breakdown Voltage
Gate to Threshold Voltage
On-State Drain Current (Note 1)
I
D
= 250μA, V
GS
= 0V (Figure 16)
V
GS
= V
DS
, I
D
= 250μA
V
DS
> I
D(ON)
x R
DS(ON)MAX
, V
GS
= 10V
V
DS
= Rated BV
DSS
, V
GS
= 0V
V
DS
=0.8xRated BV
DSS
,V
GS
=0V,T
J
= 125
V
GS
= ±20V
V
V
A
μA
μA
nA
4
25
250
±100
Zero Gate Voltage Drain Current
I
DSS
Gate to Source Leakage Current
Drain to Source On Resistance
(Note 1)
Forward Transconductance (Note 1)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Output Capacitance
Reverse - Transfer Capacitance
NOTE : 1. Pulse Test: Pulse width
≤
300μs, Duty Cycle
≤
2%.
2. MOSFET Switching Times are Essentially Independent of Operating Temperature.
3. Gate Charge is Essentially Independent of Operating Temperature.
I
GSS
R
DS(ON)
I
D
= 4.4A, V
GS
= 10V (Figure 14, 15)
0.8 0.85
g
FS
t
DLY(ON)
t
R
t
DLY(OFF)
t
F
Q
G(TOT)
Q
GS
Q
GD
C
ISS
C
OSS
C
RSS
V
DS
≥
50V, I
D
= 4.4A (Figure 18)
4.9
7.4
15
21
50
20
42
7
22
1225
200
85
S
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
21
35
74
30
63
V
DD
=250V, I
D
≈
8A, R
G
= 9.1
, R
L
=30
(Note 2)
V
GS
=10V, I
D
=8A,V
DS
=0.8 x Rated BV
DSS
I
G(REF)
=1.5mA (Figure 20)
(Note 3)
V
DS
= 25V, V
GS
= 0V, f = 1.0MHz
(Figure 17)
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