參數(shù)資料
型號: UPA1792
廠商: NEC Corp.
英文描述: SWITCHING N- AND P-CHANNEL POWER MOS FET INDUSTRIAL USE
中文描述: 開關(guān)N溝道和P溝道功率場效應(yīng)晶體管工業(yè)用
文件頁數(shù): 4/12頁
文件大?。?/td> 104K
代理商: UPA1792
Data Sheet G14557EJ1V0DS00
4
μ
PA1792
P-CHANNEL
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Drain to Source On-state Resistance
R
DS(on)1
V
GS
= –10 V, I
D
= –2.9 A
30
36
m
R
DS(on)2
V
GS
= –4.5 V, I
D
= –2.9 A
43
54
m
R
DS(on)3
V
GS
= –4.0 V, I
D
= –2.9 A
49
65
m
Gate to Source Cut-off Voltage
V
GS(off)
V
DS
= –10 V, I
D
= –1 mA
–1.5
–2.0
–2.5
V
Forward Transfer Admittance
| y
fs
|
V
DS
= –10 V, I
D
= –2.9 A
3.5
8.0
S
Drain Leakage Current
I
DSS
V
DS
= –30 V, V
GS
= 0 V
–1
μ
A
Gate to Source Leakage Current
I
GSS
V
GS
=
#
16 V, V
DS
= 0 V
V
DS
= –10 V
#
10
μ
A
Input Capacitance
C
iss
900
pF
Output Capacitance
C
oss
V
GS
= 0 V
300
pF
Reverse Transfer Capacitance
C
rss
f = 1 MHz
120
pF
Turn-on Delay Time
t
d(on)
I
D
= –2.9 A
23
ns
Rise Time
t
r
V
GS(on)
= –10 V
220
ns
Turn-off Delay Time
t
d(off)
V
DD
= –15 V
90
ns
Fall Time
t
f
R
G
= 10
70
ns
Total Gate Charge
Q
G
I
D
= –5.8 A
17
nC
Gate to Source Charge
Q
GS
V
DD
= –24 V
2.5
nC
Gate to Drain Charge
Q
GD
V
GS
= –10 V
4.0
nC
Body Diode Forward Voltage
V
F(S-D)
I
F
= 5.8 A, V
GS
= 0 V
0.85
V
Reverse Recovery Time
t
rr
I
F
= 5.8 A, V
GS
= 0 V
40
ns
Reverse Recovery Charge
Q
rr
di/dt = 100 A
/
μ
s
30
nC
TEST CIRCUIT 2 GATE CHARGE
TEST CIRCUIT 1 SWITCHING TIME
PG.
R
G
0
V
GS
(
)
D.U.T.
R
L
V
DD
τ
= 1 s
Duty Cycle
1 %
V
GS
Wave Form
I
D
Wave Form
V
GS
(
)
10 %
90 %
V
GS
(on)
10 %
0
I
D
(
)
90 %
90 %
t
d(on)
t
r
t
d(off)
t
f
10 %
τ
I
D
0
t
on
t
off
PG.
50
D.U.T.
R
L
V
DD
I
G
=
2 mA
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