- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16235 > UPC1663GV-EVAL (CEL)EVAL BOARD FOR UPC1663 PDF資料下載
參數(shù)資料
| 型號： | UPC1663GV-EVAL |
| 廠商： | CEL |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR UPC1663 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 視頻，放大器，單路 |
| 嵌入式： | * |
| 已用 IC / 零件： | * |
| 主要屬性： | * |
| 次要屬性： | * |
| 已供物品： | * |
SYMBOLS
PARAMETERS
UNITS RATINGS
VC–VE
Voltage between VC and VE
V
-0.3 to 14
PT
Total Power Dissipation2
mW
200
VID
Differential Input Voltage
V
±5
VIN
Input Voltage
V
±6
IO
Output Current
mA
35
TOP
Operating Temperature
°C
-45 to +75
TSTG
Storage Temperature
°C
-55 to +150
ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C)
EQUIVALENTCIRCUIT
75
Ω
Output
V
oltage
(V
p-p
)
Supply Voltage, V± (V)
VIDEO LINE SINGLE ENDED
OUTPUTVOLTAGESWINGvs.FREQUENCY
Frequency, f (Hz)
Relative
Gain,
Avr
2.0
1.0
0
100 k
1 M
10 M
100 M
1G
OUT
75
75
75
75
200
200
0.1
VC = 6 V, Ve = -6 V
TYPICAL PERFORMANCE UNDER SIN-
GLE SUPPLY +5 V OPERATION*
PARAMETER
CONDITIONS
TYPICAL UNITS
Differential Gain 15 MHz
Gain 1
35
dB
Gain 2
11
dB
Bandwidth
Gain is 3 dB down from
Gain 1
the gain at 100 KHz
106
MHz
Gain 2
115
MHz
Rise Time
RS = 50 Ω, VOUT = 80 mVp-p
Gain 1
2.2
ns
Propagation
Delay
Gain 1
RS = 50 Ω, VOUT = 80 mVp-p
2.8
ns
Gain 2
RS = 50 Ω, VOUT = 60 mVp-p
1.8
ns
Phase Shift
100 MHz
Gain 1
-123 degree
Gain 2
-93
degree
Output Power
ZL = 50 Ω, 15 MHz
RA = 240 Ω
5.0
dBm
RA = 910 Ω
0
dBm
RA = 80 Ω
-11.5
dBm
UPC1663GV
NORMALIZED VOLTAGE GAIN
vs. SUPPLY VOLTAGE
* See Application Circuit
Notes:
1. Operation in excess of any one of these parameters may result in
permanent damage.
2. Mounted on 50 cm x 50 cm x 1.6 mm glass epoxy PCB with
copper film (TA = Max TOP).
RECOMMENDED
OPERATING CONDITIONS (TA = 25°C)
SYMBOLS
CHARACTERISTICS UNITS MIN TYP MAX
VC
Positive Supply Voltage
V
+2 +6 +6.5
Ve
Negative Supply Voltage
V
-2 -6 -6.5
IO source
Source Current
mA
20
IO sink
Sink Current
mA
2.5
Frequency Range
MHz DC
200
Attention:
Duetohighfrequencycharacteristics,thephysicalcircuitlayoutisvery
critical.Supplyvoltagelinebypass,double-sidedprinted-circuitboard,
and wide-area ground line layout are necessary for stable operation.
Two signal resistors connected to both inputs and two load resistors
connected to both outputs should be balanced for stable operation.
TYPICAL PERFORMANCE CURVES (TA = 25°C)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.1
+2
+3
+4
+5
+6
+7
+8
VC
Gain 2
Gain 1
-2
-3
-4
-5
-6
-7
-8
VE
VC
IN1
GA
IN2
GB
OUT1
OUT2
Ve
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M3CKK-2618J | IDC CABLE - MKC26K/MC26G/MPK26K |
| M3AKK-2618J | IDC CABLE - MSC26K/MC26G/MPK26K |
| A3DDB-4436M | IDC CABLE- AKR44B/AE50M/AKR44B |
| A1RXB-4036G | IDC CABLE - APR40B/AE40G/X |
| A3DDH-4436M | IDC CABLE - AKR44H/AE44M/AKR44H |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPC1663P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| UPC1664C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| UPC1668B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| UPC1668C | 制造商:NEC 制造商全稱:NEC 功能描述:HIGH ISOLATION SILICON MMIC IF AMPLIFIER |
| UPC1668P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。