參數(shù)資料
型號(hào): UPD16311GC-AB6
廠商: NEC Corp.
英文描述: 1/8- to 1/16-DUTY FIPTM VFD CONTROLLER/DRIVER
中文描述: 1/8-的1/16-DUTY FIPTM變頻控制器/驅(qū)動(dòng)器
文件頁數(shù): 4/20頁
文件大小: 167K
代理商: UPD16311GC-AB6
4
PD16311
Pin Function
Pin No.
Symbol
Pin Name
Description
6
D
IN
Data input
Inputs serial data at rising edge of shift clock, starting from lower
bit.
5
D
OUT
Data output
Outputs serial data at falling edge of shift clock, starting from
lower bit. This is N-ch open-drain output pin.
9
STB
Strobe
Initializes serial interface at rising or falling edge to make
PD16311 waiting for reception of command. Data input after
STB has fallen is processed as command. While command data
is processed, current processing is stopped, and serial interface
is initialized. While STB is high, CLK is ignored.
8
CLK
Clock input
Reads serial data at rising edge, and outputs data at falling edge.
52
OSC
Oscillator pin
Connect resistor for determining oscillation frequency to this pin.
15 to 26
Seg
1
/KS
1
to
Seg
12
/KS
12
High-voltage output
(segment)
Segment output pins (Dual function as key source)
44 to 37
Grid
1
to Grid
6
High-voltage output (grid)
Grid output pins
27 to 32
35 to 36
Seg
13
/Grid
16
to
Seg
20
/Grid
9
High-voltage output
(segment/grid)
These pins are selectable for segment or grid output.
50 to 46
LED
1
to LED
5
LED output
CMOS output. +20 mA max.
10 to 13
Key
1
to Key
4
Key data input
Data input to these pins is latched at end of display cycle.
1 to 4
SW
1
to SW
4
Switch input
These pins constitute 4-bit general-purpose input port.
14, 33, 45
V
DD
Logic power
5 V 10 %
51
V
SS
Logic ground
Connect this pin to GND of system.
34
V
EE
Pull-down level
V
DD
35 V max.
7
IC
Internally connected
Be sure to leave this pin open (this pin is at V
DD
level).
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