
2
μ
PD16661A
PIN NAMES
Classification
Pin Name
Note
I/O
Pad No.
Function
CPU interface
D0 to D15
A0 to A16
/CS
/OE
/WE
/UBE
RDY
I/O
I
I
I
I
I
O
Data bus : 16 bits
Address bus : 17 bits
Chip select
Read signal
Write signal
Upper byte enable
Ready signal to CPU (Ready state at "H")
Control signals
PL0
PL1
PL2
DIR
MS
BMODE
GMODE
/REFRH
TEST
/RESET
/DOFF
OSC1
OSC2
STB
/FRM
L1
L2
/DOUT
I
I
I
I
I
I
I
I/O
I
I
I
I/O
I/O
I/O
I/O
O
Specifies the LSI placement positions (No. 0 to 7)
Specifies the LSI placement positions (No. 0 to 7)
Specifies the LSI placement positions (No. 0 to 7)
Specifies the liquid-crystal panel placement direction
Master/slave selection pin (Master mode at "H")
Data bus bit selection pin ("H" = 8 bits, "L" = 16 bits)
Gray scale data weight reverse switching
(When data = [1,1], "L" = black, "H" = white)
Self-diagnosis reset pin (wired-OR connection)
Test pin ("H" = test mode, on-chip pull-down resistor)
Reset signal
Display OFF input signal
Oscillator externally-attached resistor pin
Oscillator externally-attached resistor pin
Column drive signal (MS pin "H" = output, MS pin "L" = input)
Frame signal (MS pin "H" = output, MS pin "L" = input)
Row driver drive level selection signal (1st line)
Row driver drive level selection signal (2nd line)
Display OFF output signal
Liquid-crystal drive
Y1 to Y160
O
Liquid-crystal drive output
Power supplies
GND
V
CC1
V
CC2
V
0
V
1
V
2
Ground (two pins for V
CC1
system , three pins for V
CC2
system)
5-V power supply
3.3-V power supply
Liquid-crystal drive analog power supply
Liquid-crystal drive analog power supply
Liquid-crystal drive analog power supply
Note
3.3-V pin : D0 to D15, A0 to A16, /CS, /OE, /WE, /UBE, RDY, BMODE, GMODE, PL0, PL1, PL2, DIR, OSC1,
OSC2, /RESET, /DOFF, TEST, MS
5-V pin : STB, /FRM, L1, L2, /DOUT
Remark
/xxx indicates active low signal.
3.3 V
3.3 V
5.0 V
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