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參數(shù)資料
| 型號(hào)： | UPD16675AP |
| 廠商： | NEC Corp. |
| 英文描述： | 1/34, 1/36 DUTY LCD CONTROLLER/DRIVER |
| 中文描述： | 1 / 34，1 / 36稅LCD控制器/驅(qū)動(dòng) |
| 文件頁(yè)數(shù)： | 6/36頁(yè) |
| 文件大?。?/td> | 252K |
| 代理商： | UPD16675AP |
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6
μ
PD16675A
1.
PIN FUNCTIONS
1.1
Power System
Pin Symbol
Pin Name
Pin No.
I/O
Description
V
DD1
Logic power supply
pin
203, 204,
224
---
Power supply pin for logic
V
DD2
Power supply pin for
booster circuit
197
---
Power supply pin for booster circuit. Set the pin to
V
DD1
≤
V
DD2
.
V
SS
Logic ground pin
206, 221,
222
---
Ground pin for logic
V
LCD
Driver power supply
pin
180, 181
---
Driver power supply pin. Output pin of internal
booster circuit. Connect with a 1-
μ
F booster
capacitor to the V
DD2
pin.
When not using the internal booster circuit, the
driver power can be turned on directly.
V
LC1
to V
LC5
Driver reference
power supply
179 to 175
---
Reference power supply pin for LCD drive. When
the internal bias is selected, be sure to leave it open.
C
1
+
, C
1
,
C
2
+
, C
2
Capacitor connection
pins
185 to 196
---
Capacitor connection pins for booster circuit.
Connect a 1
μ
F capacitor.
V
EE
Driver ground pin
228, 229
---
Ground pin for driver
1.2
Logic System
Pin Symbol
Pin Name
Pin No.
I/O
Description
WS
Word length selection
223
I
This pin selects the word length. At High level, it
becomes an 8-bit parallel interface. At Low level, it
becomes a 4-bit parallel interface if D
7
/NS is High;
and a serial interface if D
7
/NS is Low. When the
word length is 4 bits, data is transferred in the upper-
to-lower sequence by means of data buses D
0
to D
3
.
The word length cannot be changed after power-on.
STB
Strobe
220
I
Data can be input/output at Low level either in
parallel interface or serial interface mode.
E/SCK
Enable/shift clock
219
I
In parallel interface mode, this becomes the data
enable input pin. During read-in, data is fetched into
the interface buffer at the rising edge. During read-
out, data is fetched from the interface buffer at the
falling edge.
In serial interface mode, this pin becomes the data
shift clock. During read-in, data is fetched into the
shift register at the rising edge. During read-out,
data is fetched from the shift register at the falling
edge.
CLKOUT
Clock for slave IC
output
226
O
This pin outputs an inverted oscillation clock. It
connects to slave IC’s OSC
IN
directly.
POCOUT
Power-on reset
monitor
225
O
Monitor pin for internal power-on reset.
At Low level, power-on reset is set internally. At
Low level, power-on reset is released.
The pin is for IC testing. Normally leave it open.
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