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參數(shù)資料
| 型號： | UPD168113K9-9B4-A |
| 廠商： | NEC Corp. |
| 英文描述： | MOS INTEGRATED CIRCUIT |
| 中文描述： | 馬鞍山集成電路 |
| 文件頁數(shù)： | 12/50頁 |
| 文件大小： | 771K |
| 代理商： | UPD168113K9-9B4-A |
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Data Sheet S16423EJ2V0DS
12
μ
PD168113
9. SERIAL INTERFACE SPECIFICATIONS
The internal data is determined by inputting 16-bit serial data SDATA synchronized with serial clock SCLK, and
making LATCH = L. Serial data is input from the LSB (D0) to the MSB (Df).
SDATA: When LATCH = H, data is loaded to the internal circuitry at the rising edge of SCLK, and latch
operation performed a the falling of SCLK
LATCH: Inputting SDATA is prohibited when LATCH is L. Inputting SDATA is enabled when it is H. The
internal data is determined when LATCH changes from H to L.
Because this IC generates the internal timing via the external CLK (OSCIN) its set values depend upon the
frequency of CLK.
An example where CLK = 5 MHz is given below. To input a frequency other than 5 MHz to CLK, use the following
expression. Items related to the serial register are marked .
Time: Set value = Setting example x (5/CLK [MHz] )
Frequency: Set value = Setting example x (CLK [MHz] /5)
<Data configuration>
16-bit data consists of address: 4-bit and data: 12-bit.
Four bits (Dc, Dd, De and Df) are used to set an address. Sixteen types of addresses 0 to F can be used.
Twelve bits (D0 to Db) are used to set data.
Bit
Df
De
Dd
Dc
Db
Da
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Data
Address
Data
For how to set data, refer to
Table 10
1. to Table 10
4. Serial Register List
, and
11. SERIAL COMMAND
DETAILS
.
The following chart shows an example of serial command waveforms.
Examples)
Address 1: (Df, De, Dd, Dc) = (0, 0, 0, 1)
Address A: (Df, De, Dd, Dc) = (1, 0, 1, 0)
0
SCLK
SDATA
LATCH
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
SCLK
SDATA
D0
Df
From D1
LATCH
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