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參數(shù)資料
| 型號(hào)： | UPD17072GB |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM |
| 中文描述： | 4位單芯片的數(shù)字調(diào)諧系統(tǒng)硬件單片機(jī) |
| 文件頁數(shù)： | 50/226頁 |
| 文件大?。?/td> | 1250K |
| 代理商： | UPD17072GB |
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μ
PD17072,17073
50
Table 8-1. Peripheral Hardware Control Functions of Peripheral Control Registers (1/4)
Peripheral
Control register
Peripheral hardware control function
At reset
hardware
Name
Address
Read/ b
3
Functional outline
Set value
Power-
Clock
CE
Write
b
2
Symbol
ON stop
b
1
b
0
0
1
Stack
Stack pointer
(BANK1)
R/W
0
Fixed to 0
2
2
2
(SP)
54H
0
SP1
– – – – – – – – -
Stack pointer
SP0
Timer
Basic timer 0
(BANK1)
R&
0
Fixed to 0
0
1
1
carry register
51H
Reset 0
0
BTM0CY
Detects status of carry FF
Reset
Set
Interrupt
Interrupt edge
(BANK1)
R/W
0
Fixed to 0
0
0
0
select register
56H
INT
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
Detects status of INT Pin
Low level
High level
BTM1CK
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
Sets set time interval of IRQBTM1 flag
32 ms (31.25 Hz)
8 ms (125 Hz)
IEG
Sets interrupt issuing edge of INT pin
Rising edge
Falling edge
Interrupt enable
(BANK1)
R/W
0
Fixed to 0
0
0
0
register
57H
IPSIO
– – – – – – – – -
Serial interface
Disables interrupt Enables interrupt
IPBTM1
– – – – – – – – -
Basic timer 1 Enables interrupt
IP
INT pin
INT pin interrupt
(BANK1)
R/W
0
Fixed to 0
0
0
0
request register
58H
0
0
IRQ
Detects interrupt request of INT pin
Not requested
Requested
Basic timer 1
(BANK1)
R/W
0
Fixed to 0
0
0
0
interrupt request
59H
0
register
0
IRQBTM1
Detects interrupt request of basic timer 1 Not requested
Requested
Serial interface
(BANK1)
R/W
0
Fixed to 0
0
0
0
interrupt request
5AH
0
register
0
IRQSIO
Detects interrupt of serial interface
Not requested
Requested
Pin
CE pin status
(BANK1)
R
0
Fixed to 0
–
–
–
detection register
52H
0
0
CE
Detects status of CE pin
Low level
High level
Port 1A pull-down (BANK1)
R/W
P1APLD3
– – – – – – – – –
P1A3
Resistor ON
Resistor OFF
0
R
R
select register
53H
P1APLD2
– – – – – – – – –
P1A2 Selects pull-down
P1APLD1
– – – – – – – – –
P1A1 resistor of these pins
P1APLD0
P1A0
Remark
–: Determined by status of pin, R: Previous status is retained.
– – – – – – – – -
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – -
– – – – – – – – -
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – -
– – – – – – – – -
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – -
– – – – – – – – -
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – -
– – – – – – – – -
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – -
– – – – – – – – -
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
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