參數(shù)資料
型號: UPD17207
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTERS
中文描述: 4位單片機與LCD控制器/驅(qū)動器和A / D轉(zhuǎn)換器紅外遙控遞質(zhì)
文件頁數(shù): 77/120頁
文件大小: 516K
代理商: UPD17207
μ
PD17201A, 17207
77
12.3
INTERRUPT SEQUENCE
If the IRQxx flag is set to “1” while the IPxx is “1”, processing of an interrupt starts at the end of the instruction cycle
of the instruction being executed when the IRQxx flag was set. Processing of an instruction made in the execution
of an MOVT instruction starts at the end of the second instruction cycle as the MOVT instruction runs in the second
instruction cycle.
When the IPxx flag is “0”, interrupt processing does not start until the IPxx flag is set even when the IRQxx flag
is set.
When two or more interrupts are enabled, they are processed in the ascending order of priorities. (An interrupt
must wait until processing of an interrupt of the higher priority ends.)
12.3.1
When an interrupt has been accepted, the CPU performs processing in the following sequence:
Operations When Interrupt Is Accepted
(1) Decrements the value of the stack pointer (SP) by 1.
(2) Saves the current value of the program counter to the address stack register (ASR) specified by the SP.
If the branch (BR) or subroutine call (CALL) instruction is executed when the interrupt has been accepted, the
address of the program memory (ROM) to which execution is to branch, or called is loaded to the PC.
(3) Saves the value of each flag (BCD, CMP, CY, Z, IXE) of the bank register (BANK) and program status word
(PSWORD) to the interrupt stack register (INTSK, three levels).
(4) Transfers the vector address to the PC.
One instruction cycle is required to perform the above processing.
12.3.2
To return from an interrupt processing routine, use the RETI instruction.
Then the following processing is executed within an instruction cycle.
Returning from Interrupt Processing Routine
(1) Restores the value of the interrupt stack register (INTSK) to each flag (BCD, CMP, CY, Z, IXE) of the program
status word (PSWORD).
(2) Restores the value of the address stack register (ASR) specified by the stack pointer (SP) to the program
counter.
(3) Increments the value of the stack pointer by 1.
To accept another interrupt after an interrupt has been processed, it is necessary to execute an EI instruction before
the RETI instruction.
An interrupt will never be accepted between the EI and RETI instructions as an interrupt is accepted by the EI
instruction only after the next instruction has been executed.
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