參數(shù)資料
型號： UPD17207GF
廠商： NEC Corp.
英文描述： 4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTERS
中文描述： 4位單片機(jī)與LCD控制器/驅(qū)動器和A / D轉(zhuǎn)換器紅外遙控遞質(zhì)
文件頁數(shù)： 89/120頁
文件大?。?/td> 516K
代理商： UPD17207GF
μ
PD17201A, 17207
89
Table 15-2 List of Reserved Symbols (3/4)
Symbol Name Attribute
Value
R/W
Description
SP
MEM
0.81H
R/W
Stack pointer
SYSCK
FLG
0.82H.1
R/W
Selection of system clock
XEN
FLG
0.82H.0
R/W
Main clock enable
WDTRES
FLG
0.83H.3
R/W
Watchdog timer reset
WTMMD
FLG
0.83H.2
R/W
Selection of watch timer mode
WTMRES
FLG
0.83H.1
R/W
Reset of watch timer mode
INT
FLG
0.8FH.0
R
INT pin status
NRZBF
FLG
0.91H.0
R/W
NRZ buffer data
NRZ
FLG
0.92H.0
R/W
NRZ data
ADCCMP
FLG
0.0A0H.0
R/W
Comparator result
VREFEN
FLG
0.0A1H.3
R/W
A/D converter enable flag
ADCEN
FLG
0.0A1H.2
R/W
A/D converter enable flag
ADCCH1
FLG
0.0A1H.1
R/W
A/D converter channel selection flag
ADCCH0
FLG
0.0A1H.0
R/W
A/D converter channel selection flag
SIOTS
FLG
0.0A2H.3
R/W
Serial interface start flag
SIOHIZ
FLG
0.0A2H.2
R/W
SO pin status
SIOCK1
FLG
0.0A2H.1
R/W
Serial clock selection flag for serial interface
SIOCK0
FLG
0.0A2H.0
R/W
Serial clock selection flag for serial interface
NRZEN
FLG
0.0A3H.2
R/W
NRZ enable flag
TMOE
FLG
0.0A3H.1
R/W
Timer output enable flag
SIOEN
FLG
0.0A3H.0
R/W
SIO enable flag
P0DBIO3
FLG
0.0A7H.3
R/W
I/O setting flag (bit 3 of port P0D)
P0DBIO2
FLG
0.0A7H.2
R/W
I/O setting flag (bit 2 of port P0D)
P0DBIO1
FLG
0.0A7H.1
R/W
I/O setting flag (bit 1 of port P0D)
P0DBIO0
FLG
0.0A7H.0
R/W
I/O setting flag (bit 0 of port P0D)
IPSIO
FLG
0.0AFH.3
R/W
INTSIO interrupt enable flag
IPWTM
FLG
0.0AFH.2
R/W
Watch timer interrupt enable flag
IP
FLG
0.0AFH.1
R/W
Interrupt enable flag
IPTM
FLG
0.0AFH.0
R/W
8-Bit timer interrupt enable flag
LCDEN
FLG
0.0B1H.3
R/W
LCD display enable flag
LCDCK2
FLG
0.0B1H.2
R/W
LCD display clock selection flag
LCDCK1
FLG
0.0B1H.1
R/W
LCD display clock selection flag
LCDCK0
FLG
0.0B1H.0
R/W
LCD display clock selection flag
LCDMD3
FLG
0.0B2H.3
R/W
LCD display mode register bit 3
LCDMD2
FLG
0.0B2H.2
R/W
LCD display mode register bit 2
LCDMD1
FLG
0.0B2H.1
R/W
LCD display mode register bit 1
LCDMD0
FLG
0.0B2H.0
R/W
LCD display mode register bit 0
TMEN
FLG
0.0B3H.3
R/W
Timer enable flag
TMRES
FLG
0.0B3H.2
R/W
Timer reset flag
TMCK1
FLG
0.0B3H.1
R/W
Selection of timer clock source
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