參數(shù)資料
型號: UPD17231MC
廠商: NEC Corp.
元件分類: 4位微控制器
英文描述: 4-BIT SINGLE-CHIP MICROCONTROLLER FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTER
中文描述: 4位單片機的小型通用紅外遙控器
文件頁數(shù): 57/92頁
文件大?。?/td> 378K
代理商: UPD17231MC
Data Sheet U14360EJ1V0DS00
μ
PD17230, 17231, 17232, 17233, 17234, 17235, 17236
57
8.3
STOP Mode
In the STOP mode, the system clock (f
X
) oscillation is stopped and the program execution is stopped to minimize
current consumption.
To set the STOP mode, use the STOP instruction.
The STOP mode releasing condition can be specified by the STOP instruction operand, as shown in Table 8-4.
After the STOP mode has released, the operation is performed as follows:
<1> Resets IRQTM.
<2> Starts the basic interval timer and watchdog timer (does not reset).
<3> Resets and starts the 8-bit timer.
<4> Executes the instruction next to [STOP 8H] when the current value of the 8-bit counter coincides with
the value of the modulo register (IRQTM is set).
The
μ
PD17236 oscillator is stopped, when the STOP instruction has been executed (i.e., in the STOP mode).
Oscillation is not resumed, until the STOP mode is released. After the STOP mode has been released, the HALT
mode is set. Set the time required to release the HALT mode by using the timer with modulo function.
The time that elapses, after the STOP mode has been released by occurrence of an interrupt, until an operation
mode is set, is shown in the following table.
Caution Do not execute an instruction that clears the interrupt request flag (IRQ
×××
) for which the
interrupt enable flag (IP
×××
) is set immediately before the STOP 8H instruction; otherwise, the
STOP mode may not be set.
8-Bit Modulo Register Set Value
(TMM)
Time Required to Set Operation Mode
after STOP Mode Release
At 4 MHz
40H
4.160 ms (64
μ
s
×
65)
FFH
16.384 ms (64
μ
s
×
256)
Caution To set the time required for an operation mode to be set after the STOP mode has been released,
make sure that sufficient time is allowed for oscillation to stabilize.
Remark
Set the 8-bit modulo timer before executing STOP instruction.
Table 8-4. STOP Mode Releasing Conditions
Operand Value
Releasing Conditions
1000B (08H)
<1> When any of P0A
0
-P0A
3
pins goes low
<2> When P0B
0
-P0B
3
, P0C
0
-P0C
3
, and P0D
0
-P0D
3
are used as input pins and any of these goes low
<3> If the interrupt request (IRQ) of an interrupt for which the INT pin interrupt enable flag (IP) is set
is generated at the rising or falling edge of the INT pin
Other than above
Setting prohibited
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