μ
PD17704, 17705, 17707, 17708, 17709
8
7.
ALU (Arithmetic Logic Unit) BLOCK ............................................................................................. 58
7.1
Outline of ALU Block .......................................................................................................... 58
7.2
Configuration and Function of Each Block.......................................................................
7.3
ALU Processing Instruction List......................................................................................... 59
7.4
Cautions on Using ALU ....................................................................................................... 63
59
8. REGISTER FILE (RF) ........................................................................................................................ 64
8.1
Outline of Register File ........................................................................................................ 64
8.2
Configuration and Function of Register File ....................................................................
8.3
Control Registers ................................................................................................................. 66
8.4
Port Input/Output Selection Registers ..............................................................................
8.5
Cautions on Using Register File ......................................................................................... 84
65
78
9. DATA BUFFER (DBF) ....................................................................................................................... 85
9.1
Outline of Data Buffer .......................................................................................................... 85
9.2
Data Buffer............................................................................................................................ 86
9.3
Relationships between Peripheral Hardware and Data Buffer ........................................
9.4
Cautions on Using Data Buffer ........................................................................................... 90
87
10. DATA BUFFER STACK ................................................................................................................... 91
10.1
Outline of Data Buffer Stack................................................................................................ 91
10.2
Data Buffer Stack Register .................................................................................................. 91
10.3
Data Buffer Stack Pointer .................................................................................................... 93
10.4
Operation of Data Buffer Stack ........................................................................................... 94
10.5
Using Data Buffer Stack ...................................................................................................... 95
10.6
Cautions on Using Data Buffer Stack................................................................................
95
11. GENERAL-PURPOSE PORT........................................................................................................... 96
11.1
Outline of General-purpose Port......................................................................................... 96
11.2
General-Purpose I/O Port (P0A, P0B, P0C, P1D, P2A, P2B, P2C, P2D, P3A, P3B,
P3C, P3D) .............................................................................................................................. 99
11.3
General-Purpose Input Port (P0D, P1A, P1C) ................................................................... 113
11.4
General-Purpose Output Port (P1B) .................................................................................. 116
12. INTERRUPT..................................................................................................................................... 117
12.1
Outline of Interrupt Block .................................................................................................... 117
12.2
Interrupt Control Block ........................................................................................................ 119
12.3
Interrupt Stack Register....................................................................................................... 133
12.4
Stack Pointer, Address Stack Registers, and Program Counter .................................... 137
12.5
Interrupt Enable Flip-Flop (INTE) ........................................................................................ 137
12.6
Accepting Interrupt .............................................................................................................. 138
12.7
Operations after Interrupt Has Been Accepted ................................................................ 143
12.8
Returning from Interrupt Routine ....................................................................................... 143
12.9
External Interrupts (CE and INT0 through INT4 pins) ...................................................... 144
12.10 Internal Interrupts ................................................................................................................ 147
13. TIMERS ............................................................................................................................................ 148
13.1
Outline of Timers.................................................................................................................. 148