參數(shù)資料
型號: UPD23C128000BLGX
廠商: NEC Corp.
英文描述: 128M-BIT MASK-PROGRAMMABLE ROM 16M-WORD BY 8-BIT (BYTE MODE) / 8M-WORD BY 16-BIT (WORD MODE)
中文描述: 128兆位掩膜可編程ROM的1,600字的8位(字節(jié)模式)/ 800萬字由16位(字模式)
文件頁數(shù): 11/20頁
文件大?。?/td> 253K
代理商: UPD23C128000BLGX
Data Sheet M15900EJ3V0DS
11
μ
PD23C128000BL
Read Cycle Timing Chart
t
ACC
t
OH
t
CE
t
OE
t
SKEW
t
SKEW
t
SKEW
t
OH
t
OH
t
DF Note2
t
DF Note2
t
ACC
t
ACC
Data out
Data out
Data out
(Input)
(Input)
(Input)
(Input)
A0 to A22,
A
1
Note1
O0 to O7,
O8 to O15
Note3
/CE
/OE or OE
High-Z
High-Z
Notes 1.
During WORD mode, A–1 is O15.
2.
t
DF
is the time from inactivation of Chip Enable input (/CE) or Output Enable input (/OE or OE) to
high impedance state output.
3.
During BYTE mode, O8 to O14 are high impedance and O15 is A–1.
WORD, /BYTE Switch Timing Chart
Data Out
A
1 (Input)
WORD, /BYTE (Input)
High-Z
High-Z
Data Out
Data Out
High-Z
O0 to O7 (Output)
O8 to O15 (Output)
t
OH
t
ACC
t
OH
t
WB
Data Out
Data Out
t
DF
Remark
Chip Enable (/CE) and Output Enable (/OE or OE) : Active.
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