參數(shù)資料
型號(hào)： UPD44324084F5-E40-EQ2
廠商： NEC Corp.
英文描述： 36M-BIT DDRII SRAM 4-WORD BURST OPERAT
中文描述： 36M條位SRAM的4條DDRII詞爆生產(chǎn)營(yíng)運(yùn)
文件頁(yè)數(shù)： 1/32頁(yè)
文件大小： 352K
代理商： UPD44324084F5-E40-EQ2
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MOS INTEGRATED CIRCUIT
μ
PD
44324084, 44324094, 44324184, 44324364
36M-BIT DDRII SRAM
4-WORD BURST OPERATION
Document No. M16781EJ1V0DS00 (1st edition)
Date Published October 2004 NS CP(K)
Printed in Japan
PRELIMINARY DATA SHEET
2003
Description
The
μ
PD44324084 is a 4,194,304-word by 8-bit, the
μ
PD44324094 is a 4,194,304-word by 9-bit, the
μ
PD44324184 is a
2,097,152-word by 18-bit and the
μ
PD44324364 is a 1,048,576-word by 36-bit synchronous double data rate static RAM
fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.
The
μ
PD44324084,
μ
PD44324094,
μ
PD44324184 and
μ
PD44324364 integrate unique synchronous peripheral circuitry
and a burst counter. All input registers controlled by an input clock pair (K and /K) are latched on the positive edge of K
and /K.
These products are suitable for application which require synchronous operation, high speed, low voltage, high density
and wide bit configuration.
These products are packaged in 165-pin PLASTIC FBGA.
Features
1.8 ± 0.1 V power supply and HSTL I/O
DLL circuitry for wide output data valid window and future frequency scaling
Pipelined double data rate operation
Common data input/output bus
Four-tick burst for reduced address frequency
Two input clocks (K and /K) for precise DDR timing at clock rising edges only
Two output clocks (C and /C) for precise flight time
and clock skew matching-clock and data delivered together to receiving device
Internally self-timed write control
Clock-stop capability with
μ
s restart
User programmable impedance output
Fast clock cycle time : 3.3 ns (300 MHz), 4.0 ns (250 MHz), 5.0 ns (200 MHz)
Simple control logic for easy depth expansion
JTAG boundary scan
相關(guān)PDF資料
PDF描述
UPD44324184F5-E40-EQ2 36M-BIT DDRII SRAM 4-WORD BURST OPERAT
UPD44324084F5-E50-EQ2 36M-BIT DDRII SRAM 4-WORD BURST OPERAT
UPD44324094F5-E50-EQ2 36M-BIT DDRII SRAM 4-WORD BURST OPERAT
UPD44324364F5-E40-EQ2 36M-BIT DDRII SRAM 4-WORD BURST OPERAT
UPD44324364F5-E50-EQ2 36M-BIT DDRII SRAM 4-WORD BURST OPERAT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD44324182BF5-E40-FQ1-A 制造商:Renesas Electronics Corporation 功能描述:RENUPD44324182BF5-E40-FQ1-A 36M-BIT(2M-W
UPD44324185BF5-E40-FQ1 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 36M-Bit 2M x 18 0.45ns 165-Pin BGA 制造商:Renesas Electronics Corporation 功能描述:36MB, DDRII SRAM - Trays 制造商:Renesas Electronics Corporation 功能描述:IC SRAM DDRII 36MBIT 165BGA
UPD44324362BF5-E40-FQ1 制造商:Renesas Electronics Corporation 功能描述:36MB, DDRII SRAM - Trays 制造商:Renesas Electronics Corporation 功能描述:IC SRAM DDRII 36MBIT 165BGA
UPD44324362BF5-E40-FQ1-A 制造商:Renesas Electronics Corporation 功能描述:36MB, DDRII SRAM - Trays 制造商:Renesas Electronics Corporation 功能描述:IC SRAM DDRII 36MBIT 165BGA
UPD44324365BF5-E40-FQ1 制造商:Renesas Electronics Corporation 功能描述:36MB, DDRII SRAM - Trays 制造商:Renesas Electronics Corporation 功能描述:IC SRAM DDRII 36MBIT 165BGA
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