參數(shù)資料
型號(hào)： UPD44324085F5-E33-EQ2
廠商： NEC Corp.
英文描述： 36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
中文描述： 36M條位條DDRII SRAM的分離I / O 2字爆發(fā)運(yùn)作
文件頁(yè)數(shù)： 10/32頁(yè)
文件大?。?/td> 360K
代理商： UPD44324085F5-E33-EQ2
10
Preliminary Data Sheet
M16782EJ1V0DS
μ
PD44324085, 44324095, 44324185, 44324365
Truth Table
Operation
/LD
R, /W
CLK
D or Q
WRITE cycle
L
L
L
→
H
Data in
Load address, input write data on two
Input data
D(A+0)
D(A+1)
consecutive K and /K rising edge
Input clock
K(t+1)
↑
/K(t+1)
↑
READ cycle
L
H
L
→
H
Data out
Load address, read data on two
Output data
Q(A+0)
Q(A+1)
consecutive C and /C rising edge
Output clock
/C(t+1)
↑
C(t+2)
↑
NOP (No operation)
H
X
L
→
H
High-Z
STANDBY(Clock stopped)
X
X
Stopped
Previous state
Remarks 1.
H : High level, L : Low level,
×
: don’t care,
↑
: rising edge.
2.
Data inputs are registered at K and /K rising edges. Data outputs are delivered at C and /C rising edges
except if C and /C are HIGH then Data outputs are delivered at K and /K rising edges.
3.
All control inputs in the truth table must meet setup/hold times around the rising edge (LOW to HIGH) of
K. All control inputs are registered during the rising edge of K.
4.
This device contains circuitry that will ensure the outputs will be in high impedance during power-up.
5.
Refer to state diagram and timing diagrams for clarification.
6.
It is recommended that K = /K = C = /C when clock is stopped. This is not essential but permits most
rapid restart by overcoming transmission line charging symmetrically.
相關(guān)PDF資料
PDF描述
UPD44324185F5-E33-EQ2 36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
UPD44324365F5-E33-EQ2 36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
UPD44324085F5-E40-EQ2 36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
UPD44324085 36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
UPD44324365F5-E40-EQ2 36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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UPD44324185BF5-E40-FQ1 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 36M-Bit 2M x 18 0.45ns 165-Pin BGA 制造商:Renesas Electronics Corporation 功能描述:36MB, DDRII SRAM - Trays 制造商:Renesas Electronics Corporation 功能描述:IC SRAM DDRII 36MBIT 165BGA
UPD44324362BF5-E40-FQ1 制造商:Renesas Electronics Corporation 功能描述:36MB, DDRII SRAM - Trays 制造商:Renesas Electronics Corporation 功能描述:IC SRAM DDRII 36MBIT 165BGA
UPD44324362BF5-E40-FQ1-A 制造商:Renesas Electronics Corporation 功能描述:36MB, DDRII SRAM - Trays 制造商:Renesas Electronics Corporation 功能描述:IC SRAM DDRII 36MBIT 165BGA
UPD44324365BF5-E40-FQ1 制造商:Renesas Electronics Corporation 功能描述:36MB, DDRII SRAM - Trays 制造商:Renesas Electronics Corporation 功能描述:IC SRAM DDRII 36MBIT 165BGA
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