參數(shù)資料
型號： UPD44325084F5-E33-EQ2
廠商： NEC Corp.
英文描述： 36M-BIT QDRII SRAM 4-WORD BURST OPERATION
中文描述： 36M條位推出QDRII SRAM的4個字爆發(fā)運作
文件頁數(shù)： 11/36頁
文件大?。?/td> 377K
代理商： UPD44325084F5-E33-EQ2
11
Preliminary Data Sheet
M16784EJ1V0DS
μ
PD44325084, 44325094, 44325184, 44325364
Byte Write Operation
[
μ
PD44325084]
Operation
K
/K
/NW0
/NW1
Write D0 to D7
L
→
H
–
–
0
0
L
→
H
–
0
0
Write D0 to D3
L
→
H
–
0
1
L
→
H
–
0
1
Write D4 to D7
L
→
H
–
1
0
L
→
H
–
1
0
Write nothing
L
→
H
–
1
1
L
→
H
1
1
Remarks 1.
H : High level, L : Low level,
→
: rising edge.
2.
Assumes a WRITE cycle was initiated. /NW0 and /NW1 can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.
[
μ
PD44325094]
Operation
K
/K
/BW0
Write D0 to D8
L
→
H
–
–
0
L
→
H
–
0
Write nothing
L
→
H
–
1
L
→
H
1
Remarks 1.
H : High level, L : Low level,
→
: rising edge.
2.
Assumes a WRITE cycle was initiated. /BW0 can be altered for any portion of the BURST WRITE
operation provided that the setup and hold requirements are satisfied.
[
μ
PD44325184]
Operation
K
/K
/BW0
/BW1
Write D0 to D17
L
→
H
–
–
0
0
L
→
H
–
0
0
Write D0 to D8
L
→
H
–
0
1
L
→
H
–
0
1
Write D9 to D17
L
→
H
–
1
0
L
→
H
–
1
0
Write nothing
L
→
H
–
1
1
L
→
H
1
1
Remarks 1.
H : High level, L : Low level,
→
: rising edge.
2.
Assumes a WRITE cycle was initiated. /BW0 and /BW1 can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.
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參數(shù)描述
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