參數資料
型號: UPD4481161
廠商: NEC Corp.
英文描述: 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
中文描述: 800萬位ZEROSB SRAM的流動經手術
文件頁數: 5/28頁
文件大?。?/td> 326K
代理商: UPD4481161
5
Data Sheet M15561EJ3V0DS
μ
PD4481161, 4481181, 4481321, 4481361
Pin Identifications
μ
PD4481161GF,
μ
PD4481181GF]
Symbol
Pin No.
Description
A0 to A18
37, 36, 35, 34, 33, 32, 100, 99, 82, 81,
Synchronous Address Input
44, 45, 46, 47, 48, 49, 50, 83, 80
I/O1 to I/O16
58, 59, 62, 63, 68, 69, 72, 73, 8, 9, 12, 13,
Synchronous Data In,
18, 19, 22, 23
Synchronous / Asynchronous Data Out
I/OP1, NC
Note
74
Synchronous Data In (Parity),
I/OP2, NC
Note
24
Synchronous / Asynchronous Data Out (Parity)
ADV
85
Synchronous Address Load / Advance Input
/CE, CE2, /CE2
98, 97, 92
Synchronous Chip Enable Input
/WE
88
Synchronous Write Enable Input
/BW1, /BW2
93, 94
Synchronous Byte Write Enable Input
/G
86
Asynchronous Output Enable Input
CLK
89
Clock Input
/CKE
87
Synchronous Clock Enable Input
MODE
31
Asynchronous Burst Sequence Select Input
Have to tied to V
DD
or V
SS
during normal operation
ZZ
64
Asynchronous Power Down State Input
V
DD
15, 16, 41, 65, 91
Power Supply
V
SS
14, 17, 40, 66, 67, 90
Ground
V
DD
Q
4, 11, 20, 27, 54, 61, 70, 77
Output Buffer Power Supply
V
SS
Q
5, 10, 21, 26, 55, 60, 71, 76
Output Buffer Ground
NC
1, 2, 3, 6, 7, 25, 28, 29, 30, 38, 39, 42, 43,
No Connection
51, 52, 53, 56, 57, 75, 78, 79, 84, 95, 96
Note
NC (No Connection) is used in the
μ
PD4481161GF.
I/OP1 and I/OP2 are used in the
μ
PD4481181GF.
相關PDF資料
PDF描述
UPD4481161GF-C85 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
UPD4481361 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
UPD4481361GF-C85 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
UPD4481181 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
UPD4481321 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
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