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參數(shù)資料
| 型號： | UPD4992GS-E2 |
| 廠商： | NEC Corp. |
| 英文描述： | 8-Bit Parallel I/O Calendar Clock |
| 中文描述： | 8位并行I / O時(shí)鐘日歷 |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 101K |
| 代理商： | UPD4992GS-E2 |
μ
PD4992
7
REGISTER – ADDRESS CORRESPONDENCE TABLE
ADDRESS
Register contents
HEX
BIN
b7
b6
b5
b4
b3
b2
b1
b0
0H
000B
10s second digit
1s second digit
1H
001B
10s minute digit
1s minute digit
2H
010B
12/24H
AM/PM
10s hour digit
1s hour digit
3H
011B
Leap year control
Leap year counter
Day of week digit
4H
100B
10s day digit
1s day of month digit
5H
101B
10s month digit
1s month digit
6H
110B
10s year digit
1s year digit
7H
111B
Mode register
Control register
AM/PM flag (R/W) : In 12 hour mode, 0 indicates AM, and 1 indicates PM.
Always 0 in 24 hour mode.
12/24H flag (R/W) : 0 indicates 24 hour mode, and 1 indicates 12 hour mode.
LEAP YEAR CONTROL REGISTER (R/W)
b7
b6
Mode
0
0
Leap year effective
Writing to leap year counter disabled
0
1
Leap year effective
Writing to leap year counter enabled
1
0
Leap year invalid
Writing to leap year counter disabled
1
1
Leap year invalid
Writing to leap year counter enabled
When the leap year control register is “0X” and the leap year counter is “00”
→
Leap year (Feb. has 29 days).
To disable leap year mode, write “10” to the leap year control register (Feb. 28 is followed by Mar. 1).
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