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參數(shù)資料
| 型號： | UPD61012 |
| 英文描述： | Consumer IC |
| 中文描述： | 消費性IC |
| 文件頁數(shù)： | 6/36頁 |
| 文件大?。?/td> | 252K |
| 代理商： | UPD61012 |
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μ
PD61P24
6
5.
DATA POINTER (R
0
)
R
0
(R
10
, R
00
) for the data memory can serve as the data pointer for the ROM.
R
0
specifies the low-order 8 bits in the ROM address. The high-order 2 bits in the ROM address are specified
by the control register.
Table referencing for ROM data can be easily executed by calling the ROM contents by setting the ROM address
to the data pointer.
On reset or “all clear” is input, it becomes undefined.
Figure 5-1. Data Pointer Organization
AD
0
AD
1
AD
2
AD
3
AD
4
AD
5
AD
6
AD
7
AD
8
AD
9
Control registers
(P )
R
0
R
10
R
00
6.
ACCUMULATOR (A) ……… 4 BITS
The accumulator (A) is a 4-bit register. The accumulator plays a major role in each operation.
On reset or “all clear” is input, it becomes undefined.
Figure 6-1. Accumulator Organization
A
0
A
1
A
2
A
3
A
7.
ARITHMETIC LOGIC UNIT (ALU) ……… 4 BITS
The arithmetic logic unit (ALU) is a 4-bit operation circuit, and executes simple operations, such as arithmetic
operations.
8.
FLAGS
(1) Status flag
When the status for each pin is checked by the STTS instruction, if the condition coincides with the condition
specified by the STTS instruction, the status flag (F) is set (to 1).
On reset or “all clear” is input, it becomes undefined.
(2) Carry flag
When the INC (increment) instruction or the RL (rotate left) instruction is executed, if a carry is generated from
the MSB for the accumulator, the carry flag (C) is set (to 1).
The carry flag (C) is also set (to 1), if the contents for the accumulator are “FH”, when the SCAF instruction
is executed.
On reset or “all clear” is input, it becomes undefined.
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