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參數資料
| 型號： | UPD6122G-002 |
| 廠商： | NEC Corp. |
| 英文描述： | REMOTE CONTROL TRANSMISSION CMOS IC |
| 中文描述： | 遙控傳輸CMOS集成電路 |
| 文件頁數： | 9/28頁 |
| 文件大?。?/td> | 170K |
| 代理商： | UPD6122G-002 |
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μ
PD6121, 6122
9
Figure 3-3. Example of Custom Code Setting for Ver II Specifications (
μ
PD6121-002, 6122-002)
Configuration Example
C
2
, C
1
and C
0
of the higher 8 bits of the custom code are fixed by connecting the CCS pin to KI/O
0
to KI/
O
7
. Therefore, in the configuration example, they become 1 0 0 .
C
0
C
1
C
2
C
7
, C
6
, C
5
, C
4
and C
3
of the higher 8 bits of the custom code are selected and fixed by the pull-up resistor
connected to KI/O
6
and KI/O
7
in four channels.
In this configuration example, C
3
to C
7
of the higher 8 bits of the custom code become 1 1 0 1 1 .
C
3
C
4
C
5
C
6
C
7
The inversion/non-inversion of the lower 8 bits of the custom code’ is fixed by the bit of the external pull-
up resistor of KI/O
0
to KI/O
5
.
Caution
C
6
’ and C
7
’ are fixed to 0.
CCS
KI/O
0
KI/O
1
KI/O
2
KI/O
3
KI/O
4
KI/O
5
KI/O
6
KI/O
7
V
DD
V
DD
V
DD
V
DD
Connection of any one line
: Connected
: Not connected
ROM3 selector
C
7
1
0
1
1
C
6
0
0
1
1
C
5
1
1
0
1
C
4
1
1
1
1
C
3
0
1
1
1
KI/O
6
Disconnected
Disconnected
Connected
Connected
KI/O
7
Disconnected
Connected
Disconnected
Connected
Pull-up resistor
Bit for non-inversion of custom code is set
1: Non-inversion for C
0
to C
7
0: Inversion for C
0
to C
7
External setting (Refer to Configuration Example)
Lower 8 bits of custom code’
1
0
1
0
0
0
0
0
C
0
’ C
1
’ C
2
’ C
3
’ C
4
’ C
5
’ C
6
’ C
7
’
Pull-up resistor bit
(KI/O
0
, KI/O
2
)
*
*
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