參數(shù)資料
型號： UPD6465CS
廠商： NEC Corp.
英文描述： ON-SCREEN CHARACTER DISPLAY CMOS LSI FOR 12-LINE, 24-COLUMN DECK-TYPE VCR
中文描述： 屏幕字符顯示的CMOS大規(guī)模集成電路的12線，24柱甲板型錄像機
文件頁數(shù)： 14/52頁
文件大?。?/td> 570K
代理商： UPD6465CS
μ
PD6464A,6465
14
2.5 Internal/external Mode Control, Crystal Oscillation Control Command
This command selects the video signal with which a character signal overlaps (internal mode/external mode)
and controls ON/OFF of crystal oscillation.
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
0
0
E/I
0
X
OSC
Crystal oscillation control bit
X
OSC
0
1
Function
Oscillation OFF
Oscillation ON
Internal/external mode control bit
E/I
0
1
Function
External video signal mode
Internal video signal mode
Crystal oscillation control bit
This bit controls oscillation of the crystal for internal video signal generation. When crystal oscillation is turned
ON and the mode is changed from the external video signal mode to the internal video signal mode, the internal
video signal is selected without the screen disturbed.
When crystal oscillation is turned OFF, the synchronization separation circuit does not operate. Be sure to turn
ON crystal oscillation.
Internal/external mode control bit
External video signal mode
: In this mode, character signals are output to the
μ
PD6464A and 6465, overlapping
the external video signal that is input from external. The overlapped signal is
output to the VBSO pin. If character signals should not be overlapped, set the
display ON/OFF control bit to 0 (Display OFF) with the display control command.
Moreover, a composite synchronization signal (Csync), which synchronizes with
the video signal input from external, is required to be input from the CSYIN pin.
If no Csync exists, input the composite synchronization signal generated from the
input video signal via the composite sync signal separation circuit (refer to
5.
COMPOSITE SYNC. SIGNAL SEPARATION CIRCUIT
).
In the timing generator block built in the
μ
PD6464A and 6465, a horizontal
synchronization signal and a vertical synchronization signal are generated by
separating from a composite synchronization signal synchronously. A reference
signal is generated from these synchronous signals. The reference signal is used
to reset and count the horizontal control block, vertical control block, and output
control block. If Csync is not input, characters may not be displayed because the
reference signal is not generated in the timing generator block.
: In this mode, characters are output overlapping the video signal that is created
in the
μ
PD6464A and 6465 (e.g., blue back signal) to the VBSO pin. In the internal
video signal mode, characters can be displayed on the screen because horizontal
and vertical synchronization signals are generated in a device, even if no
composite synchronization signal is input.
Internal video signal mode
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD6465GT 制造商:NEC 制造商全稱:NEC 功能描述:ON-SCREEN CHARACTER DISPLAY CMOS LSI FOR 12-LINE, 24-COLUMN DECK-TYPE VCR
UPD6465GT-101(A) 制造商:Renesas Electronics Corporation 功能描述:
UPD6465GT101-A 制造商:Renesas Electronics Corporation 功能描述:
UPD6466 制造商:NEC 制造商全稱:NEC 功能描述:ON-SCREEN CHARACTER DISPLAY CMOS IC FOR 512-CHARACTER, 12-ROW, 24-COLUMN, CAMERA-CONTAINED VCR
UPD6466GS 制造商:NEC 制造商全稱:NEC 功能描述:ON-SCREEN CHARACTER DISPLAY CMOS IC FOR 512-CHARACTER, 12-ROW, 24-COLUMN, CAMERA-CONTAINED VCR
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