參數(shù)資料
型號: UPD65052-QFP80P.7X.9
英文描述: ASIC
中文描述: 專用集成電路
文件頁數(shù): 34/64頁
文件大小: 399K
代理商: UPD65052-QFP80P.7X.9
34
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
Branch Instructions
Mnemonic
Operand
Instruction Code
Operation
Instruction
Instruction
1st Word
2nd Word
3rd Word
Length
Cycle
JMP
addr (Page 0)
E8F1
addr
PC
addr
2
1
addr (Page 1)
E9F1
addr
JC
addr (Page 0)
ECF1
addr
if CY = 1
PC
addr
addr (Page 1)
EAF1
addr
else PC
PC + 2
JNC
addr (Page 0)
EDF1
addr
if CY = 0
PC
addr
addr (Page 1)
EBF1
addr
else PC
PC + 2
if F = 1
JF
addr (Page 0)
EEF1
addr
PC
addr
addr (Page 1)
F0F1
addr
else PC
PC + 2
JNF
addr (Page 0)
EFF1
addr
if F = 0
PC
addr
addr (Page 1)
F1F1
addr
else PC
PC + 2
Caution 0 and 1, which refer to PAGE0 and 1, are not written when describing mnemonics.
Subroutine Instructions
Mnemonic
Operand
Instruction Code
Operation
Instruction
Instruction
1st Word
2nd Word
3rd Word
Length
Cycle
CALL
addr (Page 0)
E6F2
E8F1
addr
SP
SP + 1, ASR
PC, PC
addr
3
2
addr (Page 1)
E6F2
E9F1
addr
RET
E8F2
PC
ASR, SP
SP – 1
1
1
Caution 0 and 1, which refer to PAGE0 and 1, are not written when describing mnemonics.
Timer Operation Instructions
Mnemonic
Operand
Instruction Code
Operation
Instruction
Instruction
1st Word
2nd Word
3rd Word
Length
Cycle
MOV
A, T0
FFFF
(A)
(Tn)
CY
0
(Tn)
(A)
(T) n
0
n = 0, 1
1
1
A, T1
FEFF
T0, A
E5FF
n = 0, 1
T1, A
F4FF
Mnemonic
Operand
Instruction Code
Operation
Instruction
Instruction
1st Word
2nd Word
3rd Word
Length
Cycle
MOV
T, #data10
E6FF
data10
(T)
data10
(T)
((P13), (R0))
1
1
T, @R0
F4FF
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