參數(shù)資料
型號: UPD65545
英文描述: CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
中文描述: CMOS門陣列Array.Embedded的包版本2.0 |設(shè)計手冊[05/2003]
文件頁數(shù): 55/64頁
文件大小: 399K
代理商: UPD65545
55
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
15. RECOMMENDED SOLDERING CONDITIONS
Carry out the soldered packaging of this product under the following recommended conditions.
For details of the soldering conditions, refer to information material
Semiconductor Device Mounting
Technology Manual (C10535E)
.
For soldering methods and conditions other than the recommended conditions, please consult one of our NEC
sales representatives.
Table 15-1. Soldering Conditions for Surface-Mount Type
μ
PD64AMC-
×××
-5A4 : 20-pin plastic SSOP (300 mil)
μ
PD65MC-
×××
-5A4
: 20-pin plastic SSOP (300 mil)
Soldering Method
Soldering Condition
Recommended
Condition Symbol
Infrared reflow
Package peak temperature: 235
°
C; time: within 30 secs. max. (210
°
C or higher);
count: no more than three times
IR35-00-3
VPS
Package peak temperature: 215
°
C; time: 40 secs. max. (200
°
C or higher); count:
no more than three times
VP15-00-3
Wave soldering
Solder bath temperature: 260
°
C max.; time: 10 secs. max.; count: once;
Preliminary heat temperature: 120
°
C max. (Package surface temperature)
Pin temperature: 300
°
C or less ; time: 3 secs or less (for each side of the device)
WS60-00-1
Partial heating
Caution Using more than one soldering method should be avoided (except in the case of partial heating).
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